{"record":{"id":"0b19c584e6fd982e","repo":"go-delve/delve","slug":"changing-register-d-not-implemented-0b19c5","errorCode":null,"errorMessage":"changing register %d not implemented","messagePattern":"changing register (.+?) not implemented","errorType":"exception","errorClass":null,"httpStatus":null,"severity":"error","filePath":"pkg/proc/winutil/regs_arm64_arch.go","lineNumber":183,"sourceCode":"\tcase regnum.ARM64_PC:\n\t\tctx.Pc = reg.Uint64Val\n\t\treturn nil\n\tcase regnum.ARM64_SP:\n\t\tctx.Sp = reg.Uint64Val\n\t\treturn nil\n\tdefault:\n\t\tswitch {\n\t\tcase regNum >= regnum.ARM64_X0 && regNum <= regnum.ARM64_X0+30:\n\t\t\tctx.Regs[regNum-regnum.ARM64_X0] = reg.Uint64Val\n\t\t\treturn nil\n\n\t\tcase regNum >= regnum.ARM64_V0 && regNum <= regnum.ARM64_V0+30:\n\t\t\ti := regNum - regnum.ARM64_V0\n\t\t\tctx.FloatRegisters[i].Low = reg.Uint64Val\n\t\t\tctx.FloatRegisters[i].High = 0\n\t\t\treturn nil\n\t\tdefault:\n\t\t\treturn fmt.Errorf(\"changing register %d not implemented\", regNum)\n\t\t}\n\t}\n}\n","sourceCodeStart":165,"sourceCodeEnd":187,"githubUrl":"https://github.com/go-delve/delve/blob/a23773e6c31361e43246bc43a424ee009679b174/pkg/proc/winutil/regs_arm64_arch.go#L165-L187","documentation":"Delve's Windows ARM64 register writer only implements a fixed set of registers: the general-purpose registers plus V0..V30 float registers. SetReg reaches the default branch when the requested register number is outside the implemented set (e.g. V31, FPSR/FPCR, or other system registers), and throws this placeholder error.","triggerScenarios":"Calling SetReg on a Windows/arm64 target with regNum not matching any handled case — notably regnum.ARM64_V0+31 (V31), or non-vector/non-GPR registers like FPCR/FPSR that the switch does not enumerate.","commonSituations":"Tooling that assumes all ARM64 registers are writable; attempts to set V31 (which aliases the zero register ZR in instructions and is excluded from the V0..V30 range); attempts to write floating-point status/control registers during debugging sessions on Windows ARM64.","solutions":["Do not attempt to set V31 or system/FPSR/FPCR registers through this API — they are not implemented on Windows ARM64.","Restrict register writes to the implemented set: general-purpose registers and V0..V30.","If the register truly needs modification, extend winutil regs_arm64_arch.go SetReg with a case mapping regNum to the corresponding CONTEXT FloatRegisters or system field.","Verify the register index with regnum helpers before calling SetReg."],"exampleFix":"// before\ni := regNum - regnum.ARM64_V0 // regNum == ARM64_V0+31 -> falls to default\n// after\nif regNum >= regnum.ARM64_V0 && regNum <= regnum.ARM64_V0+30 {\n    i := regNum - regnum.ARM64_V0\n    ctx.FloatRegisters[i].Low = reg.Uint64Val\n    ctx.FloatRegisters[i].High = 0\n    return nil\n}\nreturn fmt.Errorf(\"register %s is not settable on windows/arm64\", regnum.ARM64ToName(regNum))","handlingStrategy":"validation","validationCode":"if regNum == regnum.ARM64_V0+31 || !(regNum >= regnum.ARM64_V0 && regNum <= regnum.ARM64_V0+30) {\n    return fmt.Errorf(\"register %d is not settable on windows/arm64\", regNum)\n}","typeGuard":"func isSettableARM64Reg(regNum int) bool {\n    return (regNum >= regnum.ARM64_V0 && regNum <= regnum.ARM64_V0+30) || isGPR(regNum)\n}","tryCatchPattern":"if err := thread.SetReg(regNum, reg); err != nil {\n    var notImpl interface{ Error() string }\n    if strings.Contains(err.Error(), \"not implemented\") {\n        // fall back: skip register or use a read-only view\n    }\n    return err\n}","preventionTips":["Only write registers known to be implemented: GPRs and V0..V30 on windows/arm64.","Never attempt V31, FPCR, or FPSR writes through this API.","Check Delve's porting notes (Documentation/internal/portnotes.md) for per-OS register support.","Guard register-write automation with a capability table per OS/arch."],"tags":["windows","arm64","registers","unimplemented"],"backgroundTag":"register-write-unimplemented","analyzedSha":"a23773e6c31361e43246bc43a424ee009679b174","analyzedAt":"2026-08-31T15:12:45.221Z","schemaVersion":2},"datasetVersion":"2026-08-31T19:17:28.585Z"}