{"record":{"id":"0d30d426c43f6f38","repo":"jax-ml/jax","slug":"vec-bitwidth","errorCode":null,"errorMessage":"{vec_bitwidth}","messagePattern":"\\{vec_bitwidth\\}","errorType":"exception","errorClass":"NotImplementedError","httpStatus":null,"severity":"error","filePath":"jax/experimental/mosaic/gpu/fragmented_array.py","lineNumber":2007,"sourceCode":"  def _lift_fast_packed_instr(\n      packed_instr: str, single_instr: str,\n  ) -> Callable[[ir.Value, ir.Value], ir.Value]:\n    def fast_instr(*args):\n      arg_ty = original_arg_ty = args[0].type\n      assert all(a.type == arg_ty for a in args)\n      if not isinstance(arg_ty, ir.VectorType):\n        args = [vector.broadcast(ir.VectorType.get((1,), arg_ty), a) for a in args]\n      arg_ty = ir.VectorType(args[0].type)\n      [vec_len] = arg_ty.shape\n      vec_bitwidth = vec_len * utils.bitwidth(arg_ty.element_type)\n      if vec_len == 1 or vec_bitwidth == 32:\n        assert vec_bitwidth.bit_count() == 1\n        if vec_bitwidth == 32:\n          cstr = \"r\"\n        elif vec_bitwidth == 16:\n          cstr = \"h\"\n        else:\n          raise NotImplementedError(vec_bitwidth)\n        int_ty = ir.IntegerType.get_signless(vec_bitwidth)\n        args_ptx = \", \".join(f\"${i}\" for i in range(len(args) + 1))\n        args_int = [utils.bitcast(a, int_ty) for a in args]\n        result_int = llvm.inline_asm(\n            int_ty,\n            args_int,\n            f\"{single_instr if vec_len == 1 else packed_instr} {args_ptx};\",\n            f\"={cstr}\" + f\",{cstr}\" * len(args)\n        )\n        assert isinstance(result_int, ir.Value)\n        return utils.bitcast(result_int, original_arg_ty)\n      else:\n        assert vec_bitwidth > 32\n        slice_len = 32 // utils.bitwidth(arg_ty.element_type)\n        offset = 0\n        slices = []\n        while offset < vec_len:\n          slice_end = min(offset + slice_len, vec_len)","sourceCodeStart":1989,"sourceCodeEnd":2025,"githubUrl":"https://github.com/jax-ml/jax/blob/1e1c6a8fc06dfcd1247076ec5cae4640cea5d7bb/jax/experimental/mosaic/gpu/fragmented_array.py#L1989-L2025","documentation":"Inside _lift_fast_packed_instr, the packed PTX instruction constraint character is only defined for 32-bit ('r') and 16-bit ('h') element bitwidths; other vector bitwidths (e.g. 64, 8) raise NotImplementedError(vec_bitwidth).","triggerScenarios":"Using packed fast instructions (e.g. packed approx math on vector registers) where each element's bitwidth is not 16 or 32, such as f64 vectors or 8-bit elements.","commonSituations":"Running approx/packed fast-math paths on f64 or sub-16-bit data after vectorization changes element widths.","solutions":["Use the non-approx, non-packed op path for unsupported widths","Compute in f32 (or f16) so the packed path applies","Report the missing width upstream if needed"],"exampleFix":"// before\ny = x.tanh(approx=True)  # f64 vector fragment\n// after\ny = x.tanh()","handlingStrategy":"fallback","validationCode":"w = utils.bitwidth(fa.mlir_dtype)\nuse_packed = w in (16, 32)","typeGuard":null,"tryCatchPattern":"try:\n    y = fast_op(x)\nexcept NotImplementedError:\n    y = precise_op(x)","preventionTips":["Keep element widths at 16/32 bits for packed fast paths"],"tags":["mosaic","gpu","ptx","packed-instruction"],"backgroundTag":"unsupported-instruction-width","analyzedSha":"1e1c6a8fc06dfcd1247076ec5cae4640cea5d7bb","analyzedAt":"2026-08-27T09:53:25.647Z","schemaVersion":2},"datasetVersion":"2026-08-27T13:17:12.746Z"}