{"record":{"id":"0fa43601e67f8f35","repo":"go-delve/delve","slug":"changing-register-d-not-implemented-0fa436","errorCode":null,"errorMessage":"changing register %d not implemented","messagePattern":"changing register (.+?) not implemented","errorType":"exception","errorClass":null,"httpStatus":null,"severity":"error","filePath":"pkg/proc/linutil/regs_ppc64le_arch.go","lineNumber":200,"sourceCode":"\t\t\treturn false, nil\n\n\t\tcase regNum >= regnum.PPC64LE_F0 && regNum <= regnum.PPC64LE_F0+31:\n\t\t\tif r.loadFpRegs != nil {\n\t\t\t\terr := r.loadFpRegs(r)\n\t\t\t\tr.loadFpRegs = nil\n\t\t\t\tif err != nil {\n\t\t\t\t\treturn false, err\n\t\t\t\t}\n\t\t\t}\n\t\t\t// On ppc64le, PPC64LE_VS0 .. PPC64LE_VS31 are mapped onto\n\t\t\t// PPC64LE_F0 .. PPC64LE_F31\n\t\t\ti := regNum - regnum.PPC64LE_VS0\n\t\t\treg.FillBytes()\n\t\t\tcopy(r.Fpregset[8*i:], reg.Bytes)\n\t\t\treturn true, nil\n\n\t\tdefault:\n\t\t\treturn false, fmt.Errorf(\"changing register %d not implemented\", regNum)\n\t\t}\n\t}\n}\n\ntype PPC64LEPtraceFpRegs struct {\n\tFp []byte\n}\n\nfunc (fpregs *PPC64LEPtraceFpRegs) Decode() (regs []proc.Register) {\n\tfor i := 0; i < len(fpregs.Fp); i += 8 {\n\t\tregs = proc.AppendBytesRegister(regs, fmt.Sprintf(\"VS%d\", i/8), fpregs.Fp[i:i+8])\n\t}\n\treturn\n}\n","sourceCodeStart":182,"sourceCodeEnd":215,"githubUrl":"https://github.com/go-delve/delve/blob/a23773e6c31361e43246bc43a424ee009679b174/pkg/proc/linutil/regs_ppc64le_arch.go#L182-L215","documentation":"The ppc64le SetReg implementation supports general-purpose registers and VS0-VS31 (vector-scalar) registers only; unhandled register numbers fall to the default case and produce this error.","triggerScenarios":"Calling SetReg on Linux/ppc64le with a register number outside the implemented GPR set and outside PPC64LE_VS0..VS0+31 (e.g. VSR upper half, SPE registers, special-purpose registers like LR/CTR when not routed).","commonSituations":"Trying to modify ppc64le special-purpose registers (LR, CTR, CR) through this code path; porting register-write code from another architecture.","solutions":["Restrict SetReg usage to GPRs and VS0-VS31 on ppc64le","Implement or use a dedicated path for SPR writes (e.g. PTRACE_SETREGSET with the right register set) if required","Validate the regnum against the supported ranges before calling SetReg"],"exampleFix":"// before\nthread.SetReg(regnum.PPC64LE_LR, reg) // not implemented here\n// after\nif regnum.PPC64LE_VS0 <= regNum && regNum <= regnum.PPC64LE_VS0+31 {\n    thread.SetReg(regNum, reg)\n} else {\n    return fmt.Errorf(\"cannot set register %d on ppc64le\", regNum)\n}","handlingStrategy":"validation","validationCode":"supported := isGPR(regNum) || (regNum >= regnum.PPC64LE_VS0 && regNum <= regnum.PPC64LE_VS0+31)\nif !supported {\n    return fmt.Errorf(\"register %d not settable on ppc64le\", regNum)\n}","typeGuard":"func isSettablePPC64LE(regNum uint64) bool {\n    return isGPR(regNum) || (regNum >= regnum.PPC64LE_VS0 && regNum <= regnum.PPC64LE_VS0+31)\n}","tryCatchPattern":"if _, err := thread.SetReg(regNum, reg); err != nil {\n    if strings.Contains(err.Error(), \"not implemented\") {\n        return fmt.Errorf(\"ppc64le register %d cannot be modified\", regNum)\n    }\n    return err\n}","preventionTips":["Only write GPRs and VS0-VS31 on ppc64le","Treat SPRs (LR, CTR, CR) as read-only through this path","Check architecture-specific regnum ranges before writes"],"tags":["go","registers","ppc64le","ptrace"],"backgroundTag":"register-not-settable","analyzedSha":"a23773e6c31361e43246bc43a424ee009679b174","analyzedAt":"2026-08-31T15:12:45.221Z","schemaVersion":2},"datasetVersion":"2026-08-31T19:17:28.585Z"}