{"record":{"id":"1c3cb3dbc94cbb8c","repo":"embassy-rs/embassy","slug":"must-not-select-pll-source-as-disable","errorCode":null,"errorMessage":"must not select PLL source as DISABLE","messagePattern":"must not select PLL source as DISABLE","errorType":"panic","errorClass":null,"httpStatus":null,"severity":"error","filePath":"embassy-stm32/src/rcc/l.rs","lineNumber":715,"sourceCode":"        pub msi: Option<Hertz>,\n    }\n\n    #[allow(unused)]\n    #[derive(Default)]\n    pub(super) struct PllOutput {\n        pub p: Option<Hertz>,\n        pub q: Option<Hertz>,\n        pub r: Option<Hertz>,\n    }\n\n    pub(super) fn init_pll(instance: PllInstance, config: Option<Pll>, input: &PllInput) -> PllOutput {\n        // Disable PLL\n        pll_enable(instance, false);\n\n        let Some(pll) = config else { return PllOutput::default() };\n\n        let pll_src = match pll.source {\n            PllSource::Disable => panic!(\"must not select PLL source as DISABLE\"),\n            PllSource::Hse => unwrap!(input.hse),\n            PllSource::Hsi => unwrap!(input.hsi),\n            PllSource::Msi => unwrap!(input.msi),\n        };\n\n        let vco_freq = pll_src / pll.prediv * pll.mul;\n\n        let p = pll.divp.map(|div| vco_freq / div);\n        let q = pll.divq.map(|div| vco_freq / div);\n        let r = pll.divr.map(|div| vco_freq / div);\n\n        #[cfg(stm32l5)]\n        if instance == PllInstance::Pllsai2 {\n            assert!(q.is_none(), \"PLLSAI2_Q is not available on L5\");\n            assert!(r.is_none(), \"PLLSAI2_R is not available on L5\");\n        }\n\n        macro_rules! write_fields {","sourceCodeStart":697,"sourceCodeEnd":733,"githubUrl":"https://github.com/embassy-rs/embassy/blob/463a07b963419a1bfe61d5d597c44acb810afb8b/embassy-stm32/src/rcc/l.rs#L697-L733","documentation":"During PLL initialization, embassy-stm32 requires the PLL clock source to be an actual oscillator (HSE, HSI, or MSI). `PllSource::Disable` exists only as a 'no PLL' placeholder, so selecting it as the source of a configured PLL is a configuration contradiction and the library panics via `panic!(\"must not select PLL source as DISABLE\")`.","triggerScenarios":"Calling `init()` / `Config::default()` with an `rcc.pll` Some(PllConfig) whose `source` field is `PllSource::Disable`, i.e. configuring PLL dividers/mul but leaving the source at its default `Disable` value.","commonSituations":"Copying a PLL config snippet but forgetting to set `.source` to Hse/Hsi/Msi; constructing PllConfig programmatically with Default derive; refactoring board configs and dropping the source assignment.","solutions":["Set `pll.source` to `PllSource::Hse`, `PllSource::Hsi`, or `PllSource::Msi` in the rcc config.","If no PLL is wanted, remove the `pll` field entirely (set it to None / omit it) instead of leaving source as Disable.","If using HSE/HIS/MSI as source, ensure the corresponding oscillator is configured and enabled in the same rcc config (hse: Some(...), hsi: true, or msi config), since the source frequency is `unwrap!`ed."],"exampleFix":"// before\npll: Some(PllConfig {\n    source: PllSource::Disable,\n    prediv: PllPreDiv::DIV1,\n    mul: PllMul::MUL9,\n    ..Default::default()\n}),\n// after\npll: Some(PllConfig {\n    source: PllSource::Hse,\n    prediv: PllPreDiv::DIV1,\n    mul: PllMul::MUL9,\n    ..Default::default()\n}),","handlingStrategy":"validation","validationCode":"if let Some(pll) = &config.rcc.pll {\n    assert!(pll.source != PllSource::Disable, \"rcc.pll.source must be Hse/Hsi/Msi, not Disable\");\n}","typeGuard":"fn pll_source_valid(pll: &PllConfig) -> bool {\n    !matches!(pll.source, PllSource::Disable)\n}","tryCatchPattern":null,"preventionTips":["Never leave PllConfig.source at its default when the pll field is Some.","Prefer omitting the pll field entirely over a placeholder Disable config.","Keep PLL source and oscillator config in the same board-config struct so they cannot diverge."],"tags":["rust","embedded","rcc","clock-config","panic"],"backgroundTag":"invalid-enum-value","analyzedSha":"463a07b963419a1bfe61d5d597c44acb810afb8b","analyzedAt":"2026-09-10T13:38:26.660Z","contentChangedAt":"2026-09-10T13:38:26.660Z","schemaVersion":2},"datasetVersion":"2026-09-16T04:17:20.429Z"}