{"record":{"id":"1ed727cda06efbce","repo":"embassy-rs/embassy","slug":"dsi-tx-escape-clock","errorCode":null,"errorMessage":"DSI TX escape clock","messagePattern":"DSI TX escape clock","errorType":"panic","errorClass":null,"httpStatus":null,"severity":"error","filePath":"embassy-stm32/src/dsihost/mode.rs","lineNumber":300,"sourceCode":"    fn set_color<Panel: DsiPanel>(&mut self, color: DsiColor) {\n        T::regs().lcolcr().modify(|w| {\n            w.set_colc(color as u8);\n            w.set_lpe(match color {\n                DsiColor::Rgb666Config1 | DsiColor::Rgb666Config2 => Panel::LOOSELY_PACKED,\n                _ => false,\n            });\n        });\n\n        // Set color coding in DSI wrapper COLMUX\n        T::regs().wcfgr().modify(|w| {\n            w.set_colmux(color as u8);\n        });\n    }\n\n    /// Set video mode registers from a [`DsiVideoConfig`]\n    fn set_video_config<Panel: DsiPanel>(&mut self, config: &DsiVideoConfig) {\n        let lane_byte_clock = self.lane_byte_clock.to_hertz().expect(\"DSI lane byte clock\");\n        let tx_escape_clock = self.tx_escape_clock.to_hertz().expect(\"DSI TX escape clock\");\n        let ltdc_clock = LTDC::frequency();\n\n        T::regs().mcr().modify(|w| w.set_cmdm(false));\n        T::regs().wcfgr().modify(|w| w.set_dsim(false));\n\n        T::regs().vmcr().modify(|w| {\n            w.set_vmt(config.mode as u8);\n            w.set_lpvsae(config.lpvsa);\n            w.set_lpvbpe(config.lpvbp);\n            w.set_lpvfpe(config.lpvfp);\n            w.set_lpvae(config.lpva);\n            w.set_lphbpe(config.lphbp);\n            w.set_lphfpe(config.lphfp);\n            w.set_fbtaae(config.bta);\n            w.set_lpce(config.lpcmd);\n        });\n\n        match config.mode {","sourceCodeStart":282,"sourceCodeEnd":318,"githubUrl":"https://github.com/embassy-rs/embassy/blob/463a07b963419a1bfe61d5d597c44acb810afb8b/embassy-stm32/src/dsihost/mode.rs#L282-L318","documentation":"Same pattern as the lane byte clock: set_video_config reads tx_escape_clock.to_hertz().expect(\"DSI TX escape clock\"). The TX escape clock (used for the DSI low-power data lane, typically lane_byte_clock/8) must have been computed and stored when the DsiHost was configured; if it is None the display setup panics.","triggerScenarios":"Calling set_video_config (via start_panel) when the DsiHost was constructed without setting tx_escape_clock — normally derived from the lane byte clock during init — e.g. when clocks were not programmed or a custom constructor path skipped the derivation.","commonSituations":"Hand-constructing DsiHost state instead of using the documented new/init path; RCC config missing the DSI kernel clock so escape clock derivation fails; driver version changes moving escape-clock computation into init while old app code skipped that call.","solutions":["Use the standard DsiHost::new/init path which computes tx_escape_clock from the lane byte clock (LSCLKDIV / /8).","Ensure dsi_phy/lane byte clock is present in the RCC config so the escape clock can be derived.","Update to the latest embassy-stm32 and follow the matching DSI example for clock setup.","If using a custom panel setup, set the escape divider registers before set_video_config runs."],"exampleFix":"// before\nlet mut dsi = DsiHost::new(...);\ndsi.enable();\n\n// after\nlet mut dsi = DsiHost::new(...);\ndsi.init(&rcc_cfg_dsiderived_clocks); // sets lane_byte_clock & tx_escape_clock\ndsi.start_panel::<Panel>(&lcd_hse_freq, ...);","handlingStrategy":"validation","validationCode":"// Ensure init path computed tx_escape_clock before set_video_config:\n// use DsiHost::new + init (which derives escape clock) instead of constructing state manually.","typeGuard":null,"tryCatchPattern":null,"preventionTips":["Use the documented DsiHost constructor/init path rather than manual setup.","Keep lane byte clock configured so the /8 escape clock can be derived.","Update embassy-stm32 and re-check the DSI example when upgrading."],"tags":["embedded","stm32","dsi","display","clock-config"],"backgroundTag":"missing-required-config-field","analyzedSha":"463a07b963419a1bfe61d5d597c44acb810afb8b","analyzedAt":"2026-09-10T13:38:26.660Z","contentChangedAt":"2026-09-10T13:38:26.660Z","schemaVersion":2},"datasetVersion":"2026-09-23T08:17:48.524Z"}