{"record":{"id":"224ace08ebfd44ef","repo":"embassy-rs/embassy","slug":"multiple-stm32xx-cargo-features-enabled-224ace","errorCode":null,"errorMessage":"Multiple stm32xx Cargo features enabled","messagePattern":"Multiple stm32xx Cargo features enabled","errorType":"panic","errorClass":null,"httpStatus":null,"severity":"error","filePath":"embassy-stm32/build.rs","lineNumber":59,"sourceCode":"fn main() {\n    let mut cfgs = common::CfgSet::new();\n    common::set_target_cfgs(&mut cfgs);\n\n    if std::env::var(\"CARGO_FEATURE_RT\").is_err()\n        && std::env::var(\"CARGO_CFG_TARGET_OS\") == Ok(\"none\".to_string())\n        && std::env::var(\"CARGO_CFG_TARGET_ARCH\") == Ok(\"arm\".to_string())\n    {\n        println!(\"cargo::warning=Building for bare-metal ARM without `rt` feature: interrupts will loop forever.\");\n    }\n\n    let chip_name = match env::vars()\n        .map(|(a, _)| a)\n        .filter(|x| x.starts_with(\"CARGO_FEATURE_STM32\") && x != \"CARGO_FEATURE_STM32_HRTIM\")\n        .get_one()\n    {\n        Ok(x) => x,\n        Err(GetOneError::None) => panic!(\"No stm32xx Cargo feature enabled\"),\n        Err(GetOneError::Multiple) => panic!(\"Multiple stm32xx Cargo features enabled\"),\n    }\n    .strip_prefix(\"CARGO_FEATURE_\")\n    .unwrap()\n    .to_ascii_lowercase();\n\n    eprintln!(\"chip: {chip_name}\");\n\n    for p in METADATA.peripherals {\n        if let Some(r) = &p.registers {\n            // The AES driver enables the peripheral's clock, which the metadata does not\n            // know for the AES of some chips (STM32L0, L1, F423): no driver there.\n            if r.kind == \"aes\" && p.rcc.is_none() {\n                continue;\n            }\n            cfgs.enable(r.kind);\n            foreach_version_cfg(&mut cfgs, r.kind, r.version, |cfgs, cfg_name| {\n                cfgs.enable(cfg_name);\n            });","sourceCodeStart":41,"sourceCodeEnd":77,"githubUrl":"https://github.com/embassy-rs/embassy/blob/463a07b963419a1bfe61d5d597c44acb810afb8b/embassy-stm32/build.rs#L41-L77","documentation":"embassy-stm32's build script requires exactly one chip target: it collects env vars starting with CARGO_FEATURE_STM32 (excluding CARGO_FEATURE_STM32_HRTIM) and asserts a single one. Multiple chip features cannot be unified into one generated codebase, so it panics.","triggerScenarios":"Cargo feature unification enables two chip features (e.g. stm32f103c8 + stm32f411ce) at once — usually because two crates in the same build each request a different chip, or a Cargo.toml lists two chip features.","commonSituations":"Same package used by binaries for different boards in one workspace; listing two chip features 'to be safe'; a dependency enabling a second chip feature.","solutions":["Keep exactly one stm32xx chip feature enabled per build (fix Cargo.toml features array)","Inspect `cargo tree -f '{p} {f}'` to find which crate pulls in the second chip feature and remove it","Split multi-board projects into separate packages or use a Cargo workspace where each package has its own single chip feature"],"exampleFix":"# before\nfeatures = [\"stm32f103c8\", \"stm32f411ce\"]\n# after\nfeatures = [\"stm32f103c8\"]","handlingStrategy":"validation","validationCode":"# ensure a single chip feature per build\ncargo tree -f '{p} {f}' | grep -oE 'stm32[a-z0-9]+' | sort -u | wc -l  # expect 1","typeGuard":null,"tryCatchPattern":null,"preventionTips":["One chip feature per package","Separate packages per board in a workspace","CI check for duplicated chip features via cargo tree"],"tags":["build-script","cargo-features","embedded","stm32"],"backgroundTag":"mutually-exclusive-options","analyzedSha":"463a07b963419a1bfe61d5d597c44acb810afb8b","analyzedAt":"2026-09-10T13:38:26.660Z","contentChangedAt":"2026-09-10T13:38:26.660Z","schemaVersion":2},"datasetVersion":"2026-09-16T04:17:20.429Z"}