{"record":{"id":"3ae5081aca741120","repo":"embassy-rs/embassy","slug":"sys-not-supported-yet","errorCode":null,"errorMessage":"SYS not supported yet","messagePattern":"SYS not supported yet","errorType":"panic","errorClass":null,"httpStatus":null,"severity":"error","filePath":"embassy-stm32/src/rcc/wba.rs","lineNumber":425,"sourceCode":"            Hertz(32_000_000) => Usbrefcksel::Mhz32,\n            _ => panic!(\n                \"cannot select OTG_HS reference clock with source frequency of {}, must be one of 16, 19.2, 20, 24, 26, 32 MHz\",\n                clk_val\n            ),\n        },\n        None => Usbrefcksel::Mhz24,\n    };\n    #[cfg(all(stm32wba, peri_usb_otg_hs))]\n    SYSCFG.otghsphycr().modify(|w| {\n        w.set_clksel(usb_refck_sel);\n    });\n\n    #[cfg(sai_v4_2pdm)]\n    let audioclk = match config.mux.sai1sel {\n        Sai1sel::Hsi => Some(HSI_FREQ),\n        Sai1sel::Pll1Q => Some(pll1.q.expect(\"PLL1.Q not configured\")),\n        Sai1sel::Pll1P => Some(pll1.p.expect(\"PLL1.P not configured\")),\n        Sai1sel::Sys => panic!(\"SYS not supported yet\"),\n        Sai1sel::Audioclk => panic!(\"AUDIOCLK not supported yet\"),\n        _ => None,\n    };\n\n    let lsi = config.ls.lsi.then_some(LSI_FREQ);\n    let lse = config.ls.lse.map(|c| c.frequency);\n\n    // Disable HSI if not used\n    if !config.hsi {\n        assert!(\n            config.mux.rngsel != mux::Rngsel::Hsi,\n            \"RNG is configured to use HSI but HSI is disabled\"\n        );\n        RCC.cr().modify(|w| w.set_hsion(false));\n    }\n\n    config.mux.init();\n","sourceCodeStart":407,"sourceCodeEnd":443,"githubUrl":"https://github.com/embassy-rs/embassy/blob/463a07b963419a1bfe61d5d597c44acb810afb8b/embassy-stm32/src/rcc/wba.rs#L407-L443","documentation":"embassy-stm32's STM32WBA RCC driver does not yet implement selecting the system clock (SYS) as the SAI1 audio clock source. When config.mux.sai1sel is Sai1sel::Sys, init panics with 'SYS not supported yet' — a driver capability limitation, not a hardware error.","triggerScenarios":"rcc init with config.mux.sai1sel = Sai1sel::Sys on an STM32WBA target with the sai_v4_2pdm feature/chip variant.","commonSituations":"Configuring SAI1 to derive its kernel clock from sysclk for simplicity; porting SAI mux settings from another STM32 family where SYS is supported.","solutions":["Set config.mux.sai1sel to Sai1sel::Hsi, Sai1sel::Pll1Q, or Sai1sel::Pll1P (configuring the corresponding clock, e.g. PLL1.Q, so it is Some)","Wait for/upgrade to an embassy-stm32 version that implements SYS for SAI1 on WBA","Contribute/patch the driver to add the Sai1sel::Sys arm if SYS routing is required"],"exampleFix":"// before\nconfig.mux.sai1sel = mux::Sai1sel::SYS; // panic: not supported\n// after\nconfig.mux.sai1sel = mux::Sai1sel::PLL1_Q; // and ensure pll1.q is configured\n// or: config.mux.sai1sel = mux::Sai1sel::HSI;","handlingStrategy":"validation","validationCode":"assert!(!matches!(config.mux.sai1sel, mux::Sai1sel::SYS),\n    \"SAI1 SYS clock source not implemented in embassy-stm32 WBA driver\");","typeGuard":"fn sai1sel_supported(sel: &mux::Sai1sel) -> bool {\n    matches!(sel, mux::Sai1sel::Hsi | mux::Sai1sel::PLL1_Q | mux::Sai1sel::PLL1_P)\n}","tryCatchPattern":null,"preventionTips":["Restrict SAI1 mux choices to HSI/PLL1Q/PLL1P on WBA","Check the driver source (#[cfg(sai_v4_2pdm)] block) for supported variants before configuring","Track embassy-stm32 releases for added SAI clock sources","Configure PLL1 Q or P when audio clocks are needed"],"tags":["rust","embedded","stm32","wba","rcc","sai","unimplemented"],"backgroundTag":"method-not-implemented","analyzedSha":"463a07b963419a1bfe61d5d597c44acb810afb8b","analyzedAt":"2026-09-10T13:38:26.660Z","contentChangedAt":"2026-09-10T13:38:26.660Z","schemaVersion":2},"datasetVersion":"2026-09-16T04:17:20.429Z"}