{"record":{"id":"511b98ffd024b0cc","repo":"golang/go","slug":"expect-v0-v31-z0-z31-or-p0-p15-found-name","errorCode":null,"errorMessage":"expect V0-V31, Z0-Z31, or P0-P15; found: {name}","messagePattern":"expect V0-V31, Z0-Z31, or P0-P15; found: (.+?)","errorType":"exception","errorClass":null,"httpStatus":null,"severity":"error","filePath":"src/cmd/asm/internal/arch/arm64.go","lineNumber":217,"sourceCode":"\t\t}\n\t}\n\treturn 0, false\n}\n\n// ARM64RegisterShift constructs an ARM64 register with shift operation.\nfunc ARM64RegisterShift(reg, op, count int16) (int64, error) {\n\t// the base register of shift operations must be general register.\n\tif reg > arm64.REG_R31 || reg < arm64.REG_R0 {\n\t\treturn 0, errors.New(\"invalid register for shift operation\")\n\t}\n\treturn int64(reg&31)<<16 | int64(op)<<22 | int64(uint16(count)), nil\n}\n\n// ARM64RegisterArrangement constructs an ARM64 vector register arrangement.\nfunc ARM64RegisterArrangement(reg int16, name, arng string) (int64, error) {\n\tvar curQ, curSize, prefix uint16\n\tif name[0] != 'V' && name[0] != 'Z' && name[0] != 'P' {\n\t\treturn 0, errors.New(\"expect V0-V31, Z0-Z31, or P0-P15; found: \" + name)\n\t}\n\tswitch name[0] {\n\tcase 'V':\n\t\tprefix = 0\n\tcase 'Z':\n\t\tprefix = 1\n\tcase 'P':\n\t\tprefix = 2\n\t}\n\tif reg < 0 {\n\t\treturn 0, errors.New(\"invalid register number: \" + name)\n\t}\n\tswitch arng {\n\tcase \"B8\":\n\t\tcurSize = 0\n\t\tcurQ = 0\n\tcase \"B16\":\n\t\tcurSize = 0","sourceCodeStart":199,"sourceCodeEnd":235,"githubUrl":"https://github.com/golang/go/blob/b6b368adc57c96c3151d224d172029f233ead2c3/src/cmd/asm/internal/arch/arm64.go#L199-L235","documentation":"The Go assembler's ARM64RegisterArrangement returns this error when the register name does not begin with 'V', 'Z', or 'P' (arm64.go:216-218). Vector arrangement suffixes (like V0.B16, Z0.S, P0) are only valid on V (NEON/AdvSIMD vector), Z (SVE vector), or P (SVE predicate) registers. A name starting with any other letter is rejected because no arrangement encoding is defined for it.","triggerScenarios":"Triggered when an ARM64 assembly operand has an arrangement suffix attached to a non-V/Z/P register, e.g., `R0.B16` or `F0.H4`. The check `name[0] != 'V' && name[0] != 'Z' && name[0] != 'P'` (arm64.go:216) fires before the arrangement string is even examined.","commonSituations":"Attaching a vector arrangement suffix (B8, B16, H4, H8, S2, S4, D1, D2, B, H, S, D, Q) to a general-purpose (R) or floating-point (F) register in hand-written `.s` files. Copying disassembly output that the Go assembler's syntax does not accept. Typos in the register prefix.","solutions":["Use V0-V31, Z0-Z31, or P0-P15 as the register when specifying an arrangement suffix.","Remove the arrangement suffix from R/F registers — scalar instructions do not take one.","Verify the instruction is actually a vector/SVE instruction that requires an arrangement.","Check the register prefix letter for typos (e.g., 'W' instead of 'V')."],"exampleFix":"; before — arrangement on a GPR\nVADD R0.B16, R1.B16, R2.B16\n\n; after — use vector registers\nVADD V0.B16, V1.B16, V2.B16","handlingStrategy":"validation","validationCode":"// Validate the register name prefix before constructing an arrangement.\nfunc validArrangementReg(name string) bool {\n    if len(name) == 0 { return false }\n    switch name[0] {\n    case 'V', 'Z', 'P': return true\n    }\n    return false\n}","typeGuard":null,"tryCatchPattern":null,"preventionTips":["Attach arrangement suffixes only to V/Z/P registers.","Remove arrangement suffixes from scalar (R/F) operands.","Verify register prefix spelling when copying from disassembly."],"tags":["go","asm","arm64","register","assembler"],"backgroundTag":null,"analyzedSha":"b6b368adc57c96c3151d224d172029f233ead2c3","analyzedAt":"2026-08-12T00:22:02.250Z","schemaVersion":2},"datasetVersion":"2026-08-12T13:17:24.610Z"}