{"record":{"id":"53bace2b6117925d","repo":"embassy-rs/embassy","slug":"watchdogchannels-all-is-not-supported-for-awd3-u-53bace","errorCode":null,"errorMessage":"WatchdogChannels::All is not supported for AWD3; use Channels(0xFFFFFF) to monitor all 24 channels","messagePattern":"WatchdogChannels::All is not supported for AWD3; use Channels\\(0xFFFFFF\\) to monitor all 24 channels","errorType":"panic","errorClass":null,"httpStatus":null,"severity":"error","filePath":"embassy-stm32/src/adc/watchdog_adc4.rs","lineNumber":353,"sourceCode":"                            }\n                        }\n                    }\n                    #[cfg(stm32u5)]\n                    {\n                        for n in 0..24usize {\n                            w.set_awdch(n, false);\n                        }\n                        match channels {\n                            WatchdogChannels::Single(ch) => w.set_awdch(ch as usize, true),\n                            WatchdogChannels::Channels(mask) => {\n                                for n in 0..24usize {\n                                    if mask & (1 << n) != 0 {\n                                        w.set_awdch(n, true);\n                                    }\n                                }\n                            }\n                            WatchdogChannels::All => {\n                                panic!(\"WatchdogChannels::All is not supported for AWD3; use Channels(0xFFFFFF) to monitor all 24 channels\");\n                            }\n                        }\n                    }\n                });\n            }\n        }\n    }\n\n    fn start_awd(&mut self) {\n        // Reset atomic flag, clear hardware ISR flag, enable NVIC + AWDIE.\n        T::state().awd_triggered[self.index].store(false, Ordering::Release);\n        T::regs().isr().write(|w| w.set_awd(self.index, true));\n        T::Interrupt::unpend();\n        unsafe {\n            T::Interrupt::enable();\n        }\n        T::regs().ier().modify(|w| w.set_awdie(self.index, true));\n    }","sourceCodeStart":335,"sourceCodeEnd":371,"githubUrl":"https://github.com/embassy-rs/embassy/blob/463a07b963419a1bfe61d5d597c44acb810afb8b/embassy-stm32/src/adc/watchdog_adc4.rs#L335-L371","documentation":"On stm32u5 ADC4-family parts, AWD3's 24-bit channel mask has no 'all channels' encoding, so embassy-stm32 panics in setup_awd when WatchdogChannels::All is used for AWD3. The caller must provide an explicit Channels bitmask; 0xFFFFFF selects all 24 channels.","triggerScenarios":"Configuring AWD3 on an STM32U5 (cfg(stm32u5) branch of setup_awd) with WatchdogChannels::All as the monitored channel selection.","commonSituations":"Generic watchdog setup helpers that apply All to every watchdog instance; porting U5 code between AWD1 (supports All) and AWD3 without adjusting the channel field.","solutions":["Replace WatchdogChannels::All with WatchdogChannels::Channels(0xFFFFFF) to monitor all 24 channels","List only the needed channels with an explicit bitmask","Switch the configuration to AWD1 if an all-channels watchdog is required"],"exampleFix":"// before\nchannels: WatchdogChannels::All,\n// after\nchannels: WatchdogChannels::Channels(0xFFFFFF),","handlingStrategy":"validation","validationCode":"// On stm32u5: if awd == Awd::Awd3 && channels == WatchdogChannels::All { channels = WatchdogChannels::Channels(0xFFFFFF); }","typeGuard":null,"tryCatchPattern":null,"preventionTips":["Never pass All to AWD3 on U5; use Channels(0xFFFFFF)","Gate chip-specific watchdog limits with cfg(stm32u5) constants","Re-verify watchdog configs after chip migrations"],"tags":["embedded","stm32","adc","watchdog","panic"],"backgroundTag":"unsupported-operation","analyzedSha":"463a07b963419a1bfe61d5d597c44acb810afb8b","analyzedAt":"2026-09-10T13:38:26.660Z","contentChangedAt":"2026-09-10T13:38:26.660Z","schemaVersion":2},"datasetVersion":"2026-09-16T04:17:20.429Z"}