{"record":{"id":"574c2d6eb53a4457","repo":"embassy-rs/embassy","slug":"cannot-select-otg-hs-reference-clock-with-source-f","errorCode":null,"errorMessage":"cannot select OTG_HS reference clock with source frequency of {}, must be one of 16, 19.2, 20, 24, 26, 32 MHz","messagePattern":"cannot select OTG_HS reference clock with source frequency of (.+?), must be one of 16, 19\\.2, 20, 24, 26, 32 MHz","errorType":"panic","errorClass":null,"httpStatus":null,"severity":"error","filePath":"embassy-stm32/src/rcc/u5.rs","lineNumber":499,"sourceCode":"    let rtc = config.ls.init();\n\n    #[cfg(all(stm32u5, peri_usb_otg_hs))]\n    let usb_refck = match config.mux.otghssel {\n        Otghssel::Hse => hse,\n        Otghssel::HseDiv2 => hse.map(|hse_val| hse_val / 2u8),\n        Otghssel::Pll1P => pll1.p,\n        Otghssel::Pll1PDiv2 => pll1.p.map(|pll1p_val| pll1p_val / 2u8),\n    };\n    #[cfg(all(stm32u5, peri_usb_otg_hs))]\n    let usb_refck_sel = match usb_refck {\n        Some(clk_val) => match clk_val {\n            Hertz(16_000_000) => Usbrefcksel::Mhz16,\n            Hertz(19_200_000) => Usbrefcksel::Mhz192,\n            Hertz(20_000_000) => Usbrefcksel::Mhz20,\n            Hertz(24_000_000) => Usbrefcksel::Mhz24,\n            Hertz(26_000_000) => Usbrefcksel::Mhz26,\n            Hertz(32_000_000) => Usbrefcksel::Mhz32,\n            _ => panic!(\n                \"cannot select OTG_HS reference clock with source frequency of {}, must be one of 16, 19.2, 20, 24, 26, 32 MHz\",\n                clk_val\n            ),\n        },\n        None => Usbrefcksel::Mhz24,\n    };\n    #[cfg(all(stm32u5, peri_usb_otg_hs))]\n    SYSCFG.otghsphycr().modify(|w| {\n        w.set_clksel(usb_refck_sel);\n    });\n\n    let lse = config.ls.lse.map(|l| l.frequency);\n    let lsi = config.ls.lsi.then_some(LSI_FREQ);\n\n    // Disable HSI if not used\n    if !config.hsi {\n        RCC.cr().modify(|w| w.set_hsion(false));\n    }","sourceCodeStart":481,"sourceCodeEnd":517,"githubUrl":"https://github.com/embassy-rs/embassy/blob/463a07b963419a1bfe61d5d597c44acb810afb8b/embassy-stm32/src/rcc/u5.rs#L481-L517","documentation":"In embassy-stm32's STM32U5 RCC init, the OTG_HS USB reference clock selector only supports source frequencies of 16, 19.2, 20, 24, 26, or 32 MHz (Usbrefcksel register field). When config.usb_refck source is set to Some with a frequency outside this set, the driver panics because no hardware divider/selector value exists for it.","triggerScenarios":"rcc init with config.usb_refck = Some(...) whose source clock frequency (e.g. HSI 16 MHz is fine, but PLL outputs like 40 MHz, 48 MHz, 64 MHz) is not one of the six supported values.","commonSituations":"Feeding a PLL Q output at a nonstandard frequency into usb_refck; assuming any clock can be selected; upgrading embassy-stm32 and hitting the stricter validation; board designs using an external oscillator with an unsupported frequency.","solutions":["Choose a usb_refck source whose frequency is exactly 16, 19.2, 20, 24, 26, or 32 MHz (tune the PLL Q divider accordingly)","Or leave usb_refck as None, which defaults to the 24 MHz selection","Add/adjust a prescaler upstream so the source presented to OTG_HS is one of the supported frequencies"],"exampleFix":"// before\nconfig.usb_refck = Some(UsbRefCkConfig { source: UsbRefCkSource::Pll1Q }); // PLL1.Q = 48 MHz -> panic\n// after\n// retune PLL1 so Q = 32 MHz, or pick a supported source\nconfig.usb_refck = Some(UsbRefCkConfig { source: UsbRefCkSource::Pll1Q }); // PLL1.Q now 32 MHz","handlingStrategy":"validation","validationCode":"const USB_REFCK_SUPPORTED: [u32; 6] = [16_000_000, 19_200_000, 20_000_000, 24_000_000, 26_000_000, 32_000_000];\nif let Some(refck) = &config.usb_refck {\n    let f = source_frequency(refck.source); // your resolved source freq\n    assert!(USB_REFCK_SUPPORTED.contains(&f), \"usb_refck source {} MHz unsupported\", f / 1_000_000);\n}","typeGuard":"fn usb_refck_supported(freq_hz: u32) -> bool {\n    matches!(freq_hz, 16_000_000 | 19_200_000 | 20_000_000 | 24_000_000 | 26_000_000 | 32_000_000)\n}","tryCatchPattern":null,"preventionTips":["Tune PLL Q outputs to one of the six supported frequencies","Leave usb_refck as None to get the 24 MHz default when unsure","Compute your full clock tree frequencies before writing the RCC config","Check embassy-stm32 docs/examples for known-good USB clock setups"],"tags":["rust","embedded","stm32","rcc","usb","clock-config"],"backgroundTag":"value-out-of-range","analyzedSha":"463a07b963419a1bfe61d5d597c44acb810afb8b","analyzedAt":"2026-09-10T13:38:26.660Z","contentChangedAt":"2026-09-10T13:38:26.660Z","schemaVersion":2},"datasetVersion":"2026-09-16T04:17:20.429Z"}