{"record":{"id":"61fa032098818ff4","repo":"embassy-rs/embassy","slug":"msi-is-not-ready-to-be-selected-as-cpu-clock-sourc","errorCode":null,"errorMessage":"MSI is not ready to be selected as CPU clock source","messagePattern":"MSI is not ready to be selected as CPU clock source","errorType":"panic","errorClass":null,"httpStatus":null,"severity":"error","filePath":"embassy-stm32/src/rcc/n6.rs","lineNumber":356,"sourceCode":"        }\n        if config.apb4 > w.ppre4() {\n            debug!(\"  - APB4\");\n            w.set_ppre4(config.apb4);\n        }\n        if config.apb5 > w.ppre5() {\n            debug!(\"  - APB5\");\n            w.set_ppre5(config.apb5);\n        }\n        if config.ahb > w.hpre() {\n            debug!(\"  - AHB\");\n            w.set_hpre(config.ahb);\n        }\n    });\n    // cpuclk\n    debug!(\"configuring cpuclk\");\n    match config.cpu {\n        CpuClk::Hsi if !RCC.sr().read().hsirdy() => panic!(\"HSI is not ready to be selected as CPU clock source\"),\n        CpuClk::Msi if !RCC.sr().read().msirdy() => panic!(\"MSI is not ready to be selected as CPU clock source\"),\n        CpuClk::Hse if !RCC.sr().read().hserdy() => panic!(\"HSE is not ready to be selected as CPU clock source\"),\n        CpuClk::Ic1 if !ic_enabled(1) => panic!(\"IC1 is not ready to be selected as CPU clock source\"),\n        _ => {}\n    }\n    // set source\n    let cpusw = Cpusw::from_bits(config.cpu.to_bits());\n    RCC.cfgr().modify(|w| w.set_cpusw(cpusw));\n    // wait for changes to take effect\n    while RCC.cfgr().read().cpusws() != Cpusws::from_bits(config.cpu.to_bits()) {}\n\n    // sysclk\n    debug!(\"configuring sysclk\");\n    match config.sys {\n        SysClk::Hsi if !RCC.sr().read().hsirdy() => panic!(\"HSI is not ready to be selected as system clock source\"),\n        SysClk::Msi if !RCC.sr().read().msirdy() => panic!(\"MSI is not ready to be selected as system clock source\"),\n        SysClk::Hse if !RCC.sr().read().hserdy() => panic!(\"HSE is not ready to be selected as system clock source\"),\n        SysClk::Ic2 if !ic_enabled(2) || !ic_enabled(6) || !ic_enabled(11) => panic!(\n            \"IC2 is not ready to be selected as system clock source (make sure that IC6 and IC11 were configured as well)\"","sourceCodeStart":338,"sourceCodeEnd":374,"githubUrl":"https://github.com/embassy-rs/embassy/blob/463a07b963419a1bfe61d5d597c44acb810afb8b/embassy-stm32/src/rcc/n6.rs#L338-L374","documentation":"During clock-tree init the requested CpuClk::Msi source is checked against RCC's msirdy status bit before switching cpuclk; MSI has not finished stabilizing (or was never enabled), and switching anyway could stall the core, so the guard panics. The input at fault is the MSI configuration/startup delay, not the RCC registers themselves.","triggerScenarios":"Setting `config.cpu = CpuClk::Msi` while `msirdy()` is false — MSI not enabled/configured in the rcc config, or its range/trim config failing to bring it up before the switch.","commonSituations":"Using MSI as CPU source without an msi config entry; disabling MSI elsewhere in config while still selecting it as cpu; reinit where MSI was turned off.","solutions":["Enable/configure MSI in the rcc config (`msi: Some(MsiConfig...)`) so it runs and is ready.","Or select a ready CPU source (Hsi/Hse/Ic1) in `config.cpu`.","Confirm no other config path disables MSI before the CPU switch."],"exampleFix":"// before\nrcc: RccConfig { cpu: CpuClk::Msi, ..Default::default() }, // msi not configured\n// after\nrcc: RccConfig { msi: Some(MsiConfig::default()), cpu: CpuClk::Msi, ..Default::default() },","handlingStrategy":"validation","validationCode":"if config.rcc.cpu == CpuClk::Msi && config.rcc.msi.is_none() {\n    panic!(\"CpuClk::Msi requires an msi config in rcc\");\n}","typeGuard":"fn msi_ready_for_cpu(rcc: &RccConfig) -> bool {\n    rcc.cpu != CpuClk::Msi || rcc.msi.is_some()\n}","tryCatchPattern":null,"preventionTips":["Always provide an MsiConfig when MSI is a clock source for cpu or sys.","Avoid configs that disable MSI earlier in the init sequence while still selecting it.","Prefer Default time_driver/sys on boards where MSI bring-up is uncertain."],"tags":["rust","embedded","rcc","stm32n6","msi","panic"],"backgroundTag":"invalid-state-transition","analyzedSha":"463a07b963419a1bfe61d5d597c44acb810afb8b","analyzedAt":"2026-09-10T13:38:26.660Z","contentChangedAt":"2026-09-10T13:38:26.660Z","schemaVersion":2},"datasetVersion":"2026-09-16T04:17:20.429Z"}