{"record":{"id":"763775e0ed01f54f","repo":"embassy-rs/embassy","slug":"pll-should-not-be-disabled-reconfigured-if-used-763775","errorCode":null,"errorMessage":"PLL should not be disabled / reconfigured if used for IC2, IC6 or IC11 (sysclksrc)","messagePattern":"PLL should not be disabled / reconfigured if used for IC2, IC6 or IC11 \\(sysclksrc\\)","errorType":"panic","errorClass":null,"httpStatus":null,"severity":"error","filePath":"embassy-stm32/src/rcc/n6.rs","lineNumber":1104,"sourceCode":"        // Return the new sys source\n        RCC.cfgr().read().syssws()\n    } else {\n        sys_src\n    };\n\n    for (n, (&pll, out)) in pll_configs.iter().zip(pll_outputs.iter_mut()).enumerate() {\n        debug!(\"configuring PLL{}\", n + 1);\n        let pll_ready = RCC.sr().read().pllrdy(n);\n\n        if is_new_pll_config(pll, n) {\n            let this_pll = Icsel::from_bits(n as u8);\n\n            if cpu_src == Cpusws::Ic1 && ic1_src == this_pll {\n                panic!(\"PLL should not be disabled / reconfigured if used for IC1 (cpuclksrc)\")\n            }\n\n            if sys_src == Syssws::Ic2 && (ic2_src == this_pll || ic6_src == this_pll || ic11_src == this_pll) {\n                panic!(\"PLL should not be disabled / reconfigured if used for IC2, IC6 or IC11 (sysclksrc)\")\n            }\n\n            *out = pll.map_or_else(\n                || {\n                    disable_pll(n);\n                    PllOutput::default()\n                },\n                |c| init_pll(Some(c), n, &pll_input),\n            );\n        } else if pll.is_some() {\n            // Config matches current register state.\n            *out = pll_output(pll, &pll_input);\n            if !pll_ready {\n                RCC.csr().write(|w| w.set_pllons(n, true));\n                while !RCC.sr().read().pllrdy(n) {}\n            }\n        }\n    }","sourceCodeStart":1086,"sourceCodeEnd":1122,"githubUrl":"https://github.com/embassy-rs/embassy/blob/463a07b963419a1bfe61d5d597c44acb810afb8b/embassy-stm32/src/rcc/n6.rs#L1086-L1122","documentation":"Companion guard to error 257 on the system-clock side: when reconfiguring a PLL, if the system clock switch is on IC2 and any of IC2/IC6/IC11 currently select this PLL, disabling it would collapse the system clock, so the driver panics before the disable/reconfigure.","triggerScenarios":"is_new_pll_config detects a changed PLL n; sys_src == Syssws::Ic2 and ic2_src, ic6_src, or ic11_src equals Icsel::from_bits(n) — the PLL being torn down is part of the active sysclk chain.","commonSituations":"Runtime retuning of a PLL that feeds the sysclk via IC2/IC6/IC11; re-running init with tweaked PLL dividers on a live system; bootloaders re-entering clock init after switching to a PLL-derived sysclk.","solutions":["Switch sysclk to a temporary independent source (e.g. HSI via a direct Syssw) before reconfiguring the PLL","Reconfigure a PLL that is not in the active IC2/IC6/IC11 chain, then retarget the ICs","Design the final clock tree up front and avoid re-running init_config on a live PLL-fed sysclk"],"exampleFix":"// before\nconfig.pll2 = Some(new_pll2_cfg); // IC2 chain runs on PLL2\ninit(config);\n// after\n// step 1: switch sysclk off the PLL chain\nconfig.sys = SysClk::Hsi;\ninit(config);\n// step 2: apply new PLL2 and switch back to SysClk::Ic2","handlingStrategy":"validation","validationCode":"let sys_src = current_sys_sws();\nlet chain = [current_ic2_sel(), current_ic6_sel(), current_ic11_sel()];\nassert!(!(sys_src == Syssws::Ic2 && chain.contains(&Icsel::from_bits(n as u8))),\n        \"switch sysclk off the IC2 chain before reconfiguring this PLL\");","typeGuard":null,"tryCatchPattern":null,"preventionTips":["Stage PLL changes while sysclk runs on HSI/MSI directly","Map your IC2/IC6/IC11 chain on paper before runtime PLL retuning","Treat any PLL in the active sysclk chain as read-only at runtime"],"tags":["rust","embedded","rcc","pll","stm32n6","sysclock"],"backgroundTag":"invalid-state-transition","analyzedSha":"463a07b963419a1bfe61d5d597c44acb810afb8b","analyzedAt":"2026-09-10T13:38:26.660Z","contentChangedAt":"2026-09-10T13:38:26.660Z","schemaVersion":2},"datasetVersion":"2026-09-16T04:17:20.429Z"}