{"record":{"id":"776c5c977085459e","repo":"embassy-rs/embassy","slug":"must-not-select-reserved-1-source-as-disable","errorCode":null,"errorMessage":"must not select RESERVED_1 source as DISABLE","messagePattern":"must not select RESERVED_1 source as DISABLE","errorType":"panic","errorClass":null,"httpStatus":null,"severity":"error","filePath":"embassy-stm32/src/rcc/wba.rs","lineNumber":497,"sourceCode":"    pub r: Option<Hertz>,\n}\n\nfn pll_enable(enabled: bool) {\n    RCC.cr().modify(|w| w.set_pllon(enabled));\n    while RCC.cr().read().pllrdy() != enabled {}\n}\n\nfn init_pll(config: Option<Pll>, input: &PllInput, voltage_range: VoltageScale) -> PllOutput {\n    // Disable PLL\n    pll_enable(false);\n\n    let Some(pll) = config else { return PllOutput::default() };\n\n    let pre_src_freq = match pll.source {\n        PllSource::Disable => panic!(\"must not select PLL source as DISABLE\"),\n        PllSource::Hse => unwrap!(input.hse),\n        PllSource::Hsi => unwrap!(input.hsi),\n        PllSource::_RESERVED_1 => panic!(\"must not select RESERVED_1 source as DISABLE\"),\n    };\n\n    // Only divide by the HSE prescaler when the PLL source is HSE\n    let src_freq = match pll.source {\n        PllSource::Hse => {\n            // read the prescaler bits and divide\n            let hsepre = RCC.cr().read().hsepre();\n            pre_src_freq / hsepre\n        }\n        _ => pre_src_freq,\n    };\n\n    // Calculate the reference clock, which is the source divided by m\n    let ref_freq = src_freq / pll.prediv;\n    // Check limits per RM0515 § 12.4.3\n    assert!(Hertz::mhz(4) <= ref_freq && ref_freq <= Hertz::mhz(16));\n\n    // Check PLL clocks per RM0515 § 12.4.5","sourceCodeStart":479,"sourceCodeEnd":515,"githubUrl":"https://github.com/embassy-rs/embassy/blob/463a07b963419a1bfe61d5d597c44acb810afb8b/embassy-stm32/src/rcc/wba.rs#L479-L515","documentation":"init_pll panics when the PLL source is PllSource::_RESERVED_1, a reserved value in the RCC register enum. Reserved register encodings have no defined behavior per the reference manual, so the driver refuses to program them.","triggerScenarios":"Constructing a PllConfig with pll.source set to PllSource::_RESERVED_1 (either manually or via an unsafe/transmuted value) and passing it through rcc init.","commonSituations":"Fiddling with register-level enums copied from reference manuals; type-punned or bit-converted configs; corrupted/incorrect generated code.","solutions":["Set pll.source to PllSource::Hse or PllSource::Hsi.","Do not construct the reserved variant directly; only obtain source values from the documented PllSource variants.","Regenerate or fix any code-generation that emits _RESERVED_* variants into user configs."],"exampleFix":"// before\nsource: PllSource::_RESERVED_1,\n// after\nsource: PllSource::Hsi,","handlingStrategy":"validation","validationCode":"assert!(!matches!(pll.source, PllSource::_RESERVED_1), \"PLL source must not be reserved\");","typeGuard":"fn pll_source_defined(s: PllSource) -> bool { matches!(s, PllSource::Hse | PllSource::Hsi | PllSource::Disable) }","tryCatchPattern":null,"preventionTips":["Only construct PllSource from its documented variants.","Never transmute raw register values into enum config types.","Review code-generation output for reserved variants leaking into configs."],"tags":["rcc","embedded","panic","clock-config"],"backgroundTag":"invalid-enum-value","analyzedSha":"463a07b963419a1bfe61d5d597c44acb810afb8b","analyzedAt":"2026-09-10T13:38:26.660Z","contentChangedAt":"2026-09-10T13:38:26.660Z","schemaVersion":2},"datasetVersion":"2026-09-23T08:17:48.524Z"}