{"record":{"id":"788bad27500af742","repo":"embassy-rs/embassy","slug":"hsi-is-not-ready-to-be-selected-as-cpu-clock-sourc","errorCode":null,"errorMessage":"HSI is not ready to be selected as CPU clock source","messagePattern":"HSI is not ready to be selected as CPU clock source","errorType":"panic","errorClass":null,"httpStatus":null,"severity":"error","filePath":"embassy-stm32/src/rcc/n6.rs","lineNumber":355,"sourceCode":"            w.set_ppre2(config.apb2);\n        }\n        if config.apb4 > w.ppre4() {\n            debug!(\"  - APB4\");\n            w.set_ppre4(config.apb4);\n        }\n        if config.apb5 > w.ppre5() {\n            debug!(\"  - APB5\");\n            w.set_ppre5(config.apb5);\n        }\n        if config.ahb > w.hpre() {\n            debug!(\"  - AHB\");\n            w.set_hpre(config.ahb);\n        }\n    });\n    // cpuclk\n    debug!(\"configuring cpuclk\");\n    match config.cpu {\n        CpuClk::Hsi if !RCC.sr().read().hsirdy() => panic!(\"HSI is not ready to be selected as CPU clock source\"),\n        CpuClk::Msi if !RCC.sr().read().msirdy() => panic!(\"MSI is not ready to be selected as CPU clock source\"),\n        CpuClk::Hse if !RCC.sr().read().hserdy() => panic!(\"HSE is not ready to be selected as CPU clock source\"),\n        CpuClk::Ic1 if !ic_enabled(1) => panic!(\"IC1 is not ready to be selected as CPU clock source\"),\n        _ => {}\n    }\n    // set source\n    let cpusw = Cpusw::from_bits(config.cpu.to_bits());\n    RCC.cfgr().modify(|w| w.set_cpusw(cpusw));\n    // wait for changes to take effect\n    while RCC.cfgr().read().cpusws() != Cpusws::from_bits(config.cpu.to_bits()) {}\n\n    // sysclk\n    debug!(\"configuring sysclk\");\n    match config.sys {\n        SysClk::Hsi if !RCC.sr().read().hsirdy() => panic!(\"HSI is not ready to be selected as system clock source\"),\n        SysClk::Msi if !RCC.sr().read().msirdy() => panic!(\"MSI is not ready to be selected as system clock source\"),\n        SysClk::Hse if !RCC.sr().read().hserdy() => panic!(\"HSE is not ready to be selected as system clock source\"),\n        SysClk::Ic2 if !ic_enabled(2) || !ic_enabled(6) || !ic_enabled(11) => panic!(","sourceCodeStart":337,"sourceCodeEnd":373,"githubUrl":"https://github.com/embassy-rs/embassy/blob/463a07b963419a1bfe61d5d597c44acb810afb8b/embassy-stm32/src/rcc/n6.rs#L337-L373","documentation":"On STM32N6, before switching the CPU clock to HSI, embassy-stm32 verifies the HSI ready flag (`RCC.sr().hsirdy()`). If HSI is not running/stable, selecting it as the CPU clock source would hang or clock-fault, so the library panics.","triggerScenarios":"Setting `config.cpu = CpuClk::Hsi` while `hsirdy()` is false at init time — HSI was never enabled, was disabled in config (`hsi: false`), or has not stabilized.","commonSituations":"Selecting HSI as CPU clock without enabling it in the rcc config; previous init turned HSI off; very early reinit where HSI enable hadn't completed.","solutions":["Enable HSI in the rcc config (`hsi: true`) so it is started and ready before selection.","Or pick a CPU clock source that is currently ready (Hse/Msi/Ic1 with proper config).","Check earlier errors/logs: if the intention was a different source, fix `config.cpu`."],"exampleFix":"// before\nrcc: RccConfig { cpu: CpuClk::Hsi, ..Default::default() }, // hsi not enabled\n// after\nrcc: RccConfig { hsi: true, cpu: CpuClk::Hsi, ..Default::default() },","handlingStrategy":"validation","validationCode":"if config.rcc.cpu == CpuClk::Hsi && !config.rcc.hsi {\n    panic!(\"CpuClk::Hsi requires hsi: true in rcc config\");\n}","typeGuard":"fn cpu_source_configured(cpu: CpuClk, rcc: &RccConfig) -> bool {\n    match cpu {\n        CpuClk::Hsi => rcc.hsi,\n        CpuClk::Hse => rcc.hse.is_some(),\n        CpuClk::Msi => rcc.msi.is_some(),\n        CpuClk::Ic1 => rcc.ics.first().map_or(false, |ic| ic.is_some()),\n    }\n}","tryCatchPattern":null,"preventionTips":["Set `hsi: true` whenever CpuClk::Hsi is selected.","Keep cpu and sys clock sources within the set of enabled oscillators.","After any reinit, re-enable HSI before selecting it again as a clock source."],"tags":["rust","embedded","rcc","stm32n6","hsi","panic"],"backgroundTag":"invalid-state-transition","analyzedSha":"463a07b963419a1bfe61d5d597c44acb810afb8b","analyzedAt":"2026-09-10T13:38:26.660Z","contentChangedAt":"2026-09-10T13:38:26.660Z","schemaVersion":2},"datasetVersion":"2026-09-16T04:17:20.429Z"}