{"record":{"id":"78a99f54bd42cc6a","repo":"wasmerio/wasmer","slug":"unsupported-move-size-source-dest","errorCode":null,"errorMessage":"unsupported move: {size:?} {source:?} {dest:?}","messagePattern":"unsupported move: (.+?) (.+?) (.+?)","errorType":"panic","errorClass":null,"httpStatus":null,"severity":"critical","filePath":"lib/compiler-singlepass/src/machine_riscv.rs","lineNumber":2395,"sourceCode":"                let addr = if ImmType::Bits12.compatible_imm(offset as _) {\n                    source\n                } else {\n                    self.assembler\n                        .emit_mov_imm(Location::GPR(SCRATCH_REG), offset as _)?;\n                    self.assembler.emit_add(\n                        Size::S64,\n                        Location::GPR(addr),\n                        Location::GPR(SCRATCH_REG),\n                        Location::GPR(SCRATCH_REG),\n                    )?;\n                    Location::Memory(SCRATCH_REG, 0)\n                };\n                self.assembler.emit_ld(size, false, dest, addr)\n            }\n            (Location::GPR(_), Location::SIMD(_)) => self.assembler.emit_mov(size, source, dest),\n            (Location::SIMD(_), Location::GPR(_)) => self.assembler.emit_mov(size, source, dest),\n            (Location::SIMD(_), Location::SIMD(_)) => self.assembler.emit_mov(size, source, dest),\n            _ => todo!(\"unsupported move: {size:?} {source:?} {dest:?}\"),\n        }\n    }\n\n    fn move_location_extend(\n        &mut self,\n        size_val: Size,\n        signed: bool,\n        source: Location,\n        size_op: Size,\n        dest: Location,\n    ) -> Result<(), CompileError> {\n        if size_op != Size::S64 {\n            codegen_error!(\"singlepass move_location_extend unreachable\");\n        }\n        let mut temps = vec![];\n        let dst = self.location_to_reg(size_op, dest, &mut temps, ImmType::None, false, None)?;\n        let src = match (size_val, signed, source) {\n            (Size::S64, _, _) => source,","sourceCodeStart":2377,"sourceCodeEnd":2413,"githubUrl":"https://github.com/wasmerio/wasmer/blob/8c4b9ee9d33fb2068863fbb3d328683e7e6ff7f5/lib/compiler-singlepass/src/machine_riscv.rs#L2377-L2413","documentation":"emit_move_location in the RISC-V singlepass backend panics when it sees a (size, source, dest) combination it cannot move between, i.e. a Location pair not covered by the GPR/SIMD match arms above. This is a codegen completeness gap: the move instruction selector lacks an arm for that operand pairing.","triggerScenarios":"Compiling wasm via singlepass on riscv64 when a move is requested with a source/dest pairing outside (GPR,GPR), (GPR,SIMD), (SIMD,GPR), (SIMD,SIMD) — e.g. Immediate/label locations in get_move_location — during any instruction-emitting compile (compile_wasm path).","commonSituations":"Early/alpha RISC-V singlepass support; modules with constant-heavy or unusual register-assignment patterns hitting the unhandled arm; mixing wasmer versions where the RISC-V backend is still behind x86 completeness.","solutions":["Use the cranelift compiler on riscv64 instead of singlepass","Upgrade wasmer to a build where this match in machine_riscv.rs is complete","For backend developers: add the missing (source, dest) arm emitting the appropriate RISC-V move sequence","Report the triggering module/opcode combination upstream"],"exampleFix":"// before\n_ => todo!(\"unsupported move: {size:?} {source:?} {dest:?}\"),\n// after\n(Location::Imm(v), Location::GPR(_)) => self.assembler.emit_load_const(size, v, dest),\npair => Err(CompileError::Codegen(format!(\"unsupported move {pair:?}\"))),","handlingStrategy":"fallback","validationCode":"// select a backend that supports moves on riscv\nlet cfg: Box<dyn CompilerConfig> = if target_is_riscv() { Box::new(Cranelift::new()) } else { Box::new(Singlepass::new()) };","typeGuard":"fn move_is_supported(source: &Location, dest: &Location) -> bool {\n    matches!(source, Location::GPR(_) | Location::SIMD(_)) && matches!(dest, Location::GPR(_) | Location::SIMD(_))\n}","tryCatchPattern":null,"preventionTips":["Avoid singlepass on riscv64; use cranelift","Run a canary suite of modules covering constant moves and register shuffles before enabling riscv singlepass","Keep backend match arms exhaustive; replace todo! with CompileError so failures are reportable","Track upstream RISC-V singlepass milestones before opting in"],"tags":["riscv","singlepass","codegen"],"backgroundTag":"singlepass-riscv-unsupported-location","analyzedSha":"8c4b9ee9d33fb2068863fbb3d328683e7e6ff7f5","analyzedAt":"2026-09-01T23:06:31.009Z","contentChangedAt":null,"schemaVersion":2},"datasetVersion":"2026-09-09T06:17:21.866Z"}