{"record":{"id":"80eb01b2edf28c99","repo":"embassy-rs/embassy","slug":"dlc-15","errorCode":null,"errorMessage":"DLC > 15","messagePattern":"DLC > 15","errorType":"panic","errorClass":null,"httpStatus":null,"severity":"error","filePath":"embassy-stm32/src/can/fd/message_ram/rxfifo_element.rs","lineNumber":104,"sourceCode":"    #[inline(always)]\n    pub fn anmf(&self) -> ANMF_R {\n        ANMF_R::new(((self.bits[1] >> 31) & 0x01) != 0)\n    }\n    pub fn to_data_length(&self) -> DataLength {\n        let dlc = self.dlc().bits();\n        let ff = self.fdf().frame_format();\n        let len = if ff == FrameFormat::Fdcan {\n            // See RM0433 Rev 7 Table 475. DLC coding\n            match dlc {\n                0..=8 => dlc,\n                9 => 12,\n                10 => 16,\n                11 => 20,\n                12 => 24,\n                13 => 32,\n                14 => 48,\n                15 => 64,\n                _ => panic!(\"DLC > 15\"),\n            }\n        } else {\n            match dlc {\n                0..=8 => dlc,\n                9..=15 => 8,\n                _ => panic!(\"DLC > 15\"),\n            }\n        };\n        DataLength::new(len, ff)\n    }\n    pub fn to_filter_match(&self) -> FilterFrameMatch {\n        if self.anmf().is_matching_frame() {\n            FilterFrameMatch::DidMatch(self.fidx().bits())\n        } else {\n            FilterFrameMatch::DidNotMatch\n        }\n    }\n}","sourceCodeStart":86,"sourceCodeEnd":122,"githubUrl":"https://github.com/embassy-rs/embassy/blob/463a07b963419a1bfe61d5d597c44acb810afb8b/embassy-stm32/src/can/fd/message_ram/rxfifo_element.rs#L86-L122","documentation":"`RxFifoElement::to_data_length` converts a received DLC field back into a byte length. For FDCAN frames, DLC values are only defined up to 15 (64 bytes); a DLC read from message RAM above 15 is invalid hardware state, so the code panics. This should only occur if the message RAM was corrupted or interpreted wrongly.","triggerScenarios":"Calling `to_data_length` on an RX FIFO element whose FDCAN-frame DLC field is > 15 — i.e. after message RAM corruption, wrong element layout/misalignment, or reading a stale/garbage element.","commonSituations":"Misconfigured message RAM sizes or element addresses in the driver configuration; races between reading the element and hardware overwriting it; incorrect FIFO index arithmetic.","solutions":["Verify message RAM layout configuration (rx_fifo sizes/offsets) matches the chip's actual RAM map.","Ensure the element is read only after the FIFO acknowledges a new frame (check RX FIFO fill/status flags).","Update embassy-stm32 — older revisions had message RAM layout bugs."],"exampleFix":null,"handlingStrategy":"validation","validationCode":"let dlc = element_hdr & 0xF; debug_assert!(dlc <= 15, \"corrupted DLC field\");","typeGuard":null,"tryCatchPattern":null,"preventionTips":["Verify message RAM layout config matches the chip reference manual.","Read RX elements only after the FIFO signals a complete frame.","Keep embassy-stm32 updated for message RAM layout fixes."],"tags":["embedded","can-fd","panic","hardware-corruption"],"backgroundTag":"internal-invariant-violation","analyzedSha":"463a07b963419a1bfe61d5d597c44acb810afb8b","analyzedAt":"2026-09-10T13:38:26.660Z","contentChangedAt":"2026-09-10T13:38:26.660Z","schemaVersion":2},"datasetVersion":"2026-09-16T04:17:20.429Z"}