{"record":{"id":"85451f96e2958900","repo":"rust-lang/rust","slug":"unsupported-llvm-intrinsic","errorCode":null,"errorMessage":"unsupported LLVM intrinsic {}","messagePattern":"unsupported LLVM intrinsic (.+?)","errorType":"panic","errorClass":null,"httpStatus":null,"severity":"error","filePath":"compiler/rustc_codegen_gcc/src/intrinsic/llvm.rs","lineNumber":1037,"sourceCode":"                return true;\n            }\n        }\n        _ => (),\n    }\n\n    false\n}\n\n#[cfg(not(feature = \"master\"))]\npub fn intrinsic<'gcc, 'tcx>(name: &str, cx: &CodegenCx<'gcc, 'tcx>) -> Function<'gcc> {\n    let gcc_name = match name {\n        \"llvm.x86.sse2.pause\" => {\n            // NOTE: pause is only a hint, so we use a dummy built-in because target built-ins\n            // are not supported in libgccjit 12.\n            \"__builtin_inff\"\n        }\n        \"llvm.x86.xgetbv\" => \"__builtin_trap\",\n        _ => unimplemented!(\"unsupported LLVM intrinsic {}\", name),\n    };\n    let func = cx.context.get_builtin_function(gcc_name);\n    cx.functions.borrow_mut().insert(gcc_name.to_string(), func);\n    func\n}\n\n#[cfg(feature = \"master\")]\npub fn intrinsic<'gcc, 'tcx>(name: &str, cx: &CodegenCx<'gcc, 'tcx>) -> Function<'gcc> {\n    let gcc_name = match name {\n        \"llvm.prefetch.p0\" => {\n            let gcc_name = \"__builtin_prefetch\";\n            let func = cx.context.get_builtin_function(gcc_name);\n            cx.functions.borrow_mut().insert(gcc_name.to_string(), func);\n            return func;\n        }\n\n        \"llvm.aarch64.isb\" => {\n            // FIXME: GCC doesn't support __builtin_arm_isb yet, check if this builtin is OK.","sourceCodeStart":1019,"sourceCodeEnd":1055,"githubUrl":"https://github.com/rust-lang/rust/blob/7088e4b63a9516ebfbfe2ab2d999cf01a528ac14/compiler/rustc_codegen_gcc/src/intrinsic/llvm.rs#L1019-L1055","documentation":"An `unimplemented!(\"unsupported LLVM intrinsic {}\")` ICE in rustc_codegen_gcc's `intrinsic` function under `#[cfg(not(feature = \"master\"))]`. The non-master codegen path can only lower two LLVM intrinsic names (`llvm.x86.sse2.pause`, `llvm.x86.xgetbv`); every other LLVM intrinsic name falls through to the panic. The `master` cfg (the file's other branch) has a large table mapping LLVM intrinsics to GCC builtins, but the non-master build does not.","triggerScenarios":"Using inline-asm-derived or `std::arch`-derived LLVM intrinsics (e.g. AVX/SSE/NEON builtins) in code compiled with a `rustc_codegen_gcc` built WITHOUT the `master` feature. Any intrinsic name not in the two-entry allowlist at llvm.rs:1030-1037 panics.","commonSituations":"Crates that use platform intrinsics (`core::arch::x86_64::*`, SIMD, `core::intrinsics`) compiled via a distro-built (non-master) cg_gcc backend. Common when a user enables `-Zcodegen-backend=gcc` globally and then builds a numeric/simd-heavy crate.","solutions":["Build rustc_codegen_gcc WITH the `master` cargo feature (recent libgccjit) so the large intrinsic table at llvm.rs:1044+ is compiled in.","Switch to the LLVM backend, which natively understands all LLVM intrinsics.","Avoid `#[target_feature]` / `std::arch` intrinsics in the crate being compiled by the non-master GCC backend."],"exampleFix":"# before (non-master cg_gcc + intrinsics -> ICE)\nrustc -Zcodegen-backend=gcc simd_crate.rs\n\n# after — enable master feature when building cg_gcc, or use LLVM\n# in rustc_codegen_gcc/Cargo.toml:  features = [\"master\"]\n# or:\nrustc simd_crate.rs","handlingStrategy":"fallback","validationCode":"# Detect intrinsics usage + non-master cg_gcc\nif grep -rqE 'core::arch|core::intrinsics|target_feature' src/ && [[ \"${RUSTFLAGS:-}\" == *codegen-backend=gcc* ]]; then\n  echo \"avoid: non-master cg_gcc only lowers 2 LLVM intrinsics; enable 'master' feature or use LLVM\"\nfi","typeGuard":null,"tryCatchPattern":null,"preventionTips":["Build rustc_codegen_gcc with the `master` cargo feature when SIMD/arch intrinsics are needed.","Default to LLVM for crates using `core::arch` / `#[target_feature]`.","Grep source for `core::arch` and `core::intrinsics` before flipping on the GCC backend globally."],"tags":["rustc","codegen-gcc","llvm-intrinsic","simd","libgccjit","ice","compiler-internal"],"backgroundTag":null,"analyzedSha":"7088e4b63a9516ebfbfe2ab2d999cf01a528ac14","analyzedAt":"2026-08-10T14:17:03.603Z","contentChangedAt":null,"schemaVersion":2},"datasetVersion":"2026-09-14T05:17:10.506Z"}