{"record":{"id":"8867ce2c182ee034","repo":"embassy-rs/embassy","slug":"dlc-15-8867ce","errorCode":null,"errorMessage":"DLC > 15","messagePattern":"DLC > 15","errorType":"panic","errorClass":null,"httpStatus":null,"severity":"error","filePath":"embassy-stm32/src/can/fd/message_ram/txbuffer_element.rs","lineNumber":356,"sourceCode":"    #[inline(always)]\n    pub fn mm(&self) -> MM_R {\n        MM_R::new(((self.bits[1] >> 24) & 0xFF) as u8)\n    }\n    pub fn to_data_length(&self) -> DataLength {\n        let dlc = self.dlc().bits();\n        let ff = self.fdf().frame_format();\n        let len = if ff == FrameFormat::Fdcan {\n            // See RM0433 Rev 7 Table 475. DLC coding\n            match dlc {\n                0..=8 => dlc,\n                9 => 12,\n                10 => 16,\n                11 => 20,\n                12 => 24,\n                13 => 32,\n                14 => 48,\n                15 => 64,\n                _ => panic!(\"DLC > 15\"),\n            }\n        } else {\n            match dlc {\n                0..=8 => dlc,\n                9..=15 => 8,\n                _ => panic!(\"DLC > 15\"),\n            }\n        };\n        DataLength::new(len, ff)\n    }\n    pub fn to_event(&self) -> Event {\n        let mm = self.mm().bits();\n        let efc = self.efc().to_event_control();\n        match efc {\n            EventControl::DoNotStore => Event::NoEvent,\n            EventControl::Store => Event::Event(mm),\n        }\n    }","sourceCodeStart":338,"sourceCodeEnd":374,"githubUrl":"https://github.com/embassy-rs/embassy/blob/463a07b963419a1bfe61d5d597c44acb810afb8b/embassy-stm32/src/can/fd/message_ram/txbuffer_element.rs#L338-L374","documentation":"FDCAN branch of `TxBufferElement::to_data_length` (DLC-to-byte-length conversion for transmitted events/buffers): a DLC above 15 is undefined and panics. As with the RX variant, this should be unreachable because DLC is a 4-bit field; hitting it means corrupted TX buffer contents or misaligned element reads.","triggerScenarios":"Calling `to_data_length` on a TX buffer element whose FDCAN-frame DLC field is > 15, typically via TX event FIFO processing after message RAM corruption or layout misconfiguration.","commonSituations":"Wrong message RAM offsets for the TX event FIFO; element read before hardware finished writing; concurrent access without proper synchronization.","solutions":["Verify TX buffer/TX event FIFO offsets in the message RAM configuration.","Only process TX event elements after the transmit-event interrupt signals a valid entry.","Update embassy-stm32 to a version with corrected message RAM layout definitions for your chip."],"exampleFix":null,"handlingStrategy":"validation","validationCode":"let dlc = element_hdr & 0xF; debug_assert!(dlc <= 15, \"corrupted TX event DLC\");","typeGuard":null,"tryCatchPattern":null,"preventionTips":["Confirm TX event FIFO offsets in message RAM configuration.","Process TX events only after the event interrupt fires.","Update the HAL if your chip's message RAM layout was fixed in newer releases."],"tags":["embedded","can-fd","panic","hardware-corruption"],"backgroundTag":"internal-invariant-violation","analyzedSha":"463a07b963419a1bfe61d5d597c44acb810afb8b","analyzedAt":"2026-09-10T13:38:26.660Z","contentChangedAt":"2026-09-10T13:38:26.660Z","schemaVersion":2},"datasetVersion":"2026-09-16T04:17:20.429Z"}