{"record":{"id":"8fb58f6a356366b5","repo":"embassy-rs/embassy","slug":"ahb-frequency-is-too-low","errorCode":null,"errorMessage":"AHB frequency is too low","messagePattern":"AHB frequency is too low","errorType":"panic","errorClass":null,"httpStatus":null,"severity":"error","filePath":"embassy-nrf/src/usb/usbhs.rs","lineNumber":353,"sourceCode":"}\n\nfn current_hclk() -> u32 {\n    match pac::OSCILLATORS.pll().currentfreq().read().currentfreq() {\n        pac::oscillators::vals::Currentfreq::Ck128m => 128_000_000,\n        pac::oscillators::vals::Currentfreq::Ck64m => 64_000_000,\n        _ => unreachable!(),\n    }\n}\n\nfn calculate_trdt(speed: Dspd) -> u8 {\n    let ahb_freq = current_hclk();\n    match speed {\n        Dspd::HIGH_SPEED => {\n            assert!(ahb_freq >= 30_000_000, \"AHB frequency is too low for USBHS\");\n            0x9\n        }\n        Dspd::FULL_SPEED_EXTERNAL | Dspd::FULL_SPEED_INTERNAL => match ahb_freq {\n            0..=14_199_999 => panic!(\"AHB frequency is too low\"),\n            14_200_000..=14_999_999 => 0xF,\n            15_000_000..=15_999_999 => 0xE,\n            16_000_000..=17_199_999 => 0xD,\n            17_200_000..=18_499_999 => 0xC,\n            18_500_000..=19_999_999 => 0xB,\n            20_000_000..=21_799_999 => 0xA,\n            21_800_000..=23_999_999 => 0x9,\n            24_000_000..=27_499_999 => 0x8,\n            27_500_000..=31_999_999 => 0x7,\n            32_000_000..=u32::MAX => 0x6,\n        },\n        _ => unimplemented!(),\n    }\n}\n\nfn busy_wait_us(us: u32) {\n    #[cfg(feature = \"time\")]\n    embassy_time::block_for(embassy_time::Duration::from_micros(us as u64));","sourceCodeStart":335,"sourceCodeEnd":371,"githubUrl":"https://github.com/embassy-rs/embassy/blob/463a07b963419a1bfe61d5d597c44acb810afb8b/embassy-nrf/src/usb/usbhs.rs#L335-L371","documentation":"The USBHS (high-speed USB) driver computes the USB turn-around time (TRDT) from the AHB bus clock frequency. For high-speed operation the AHB clock must be at least 30 MHz (asserted directly), and for full-speed operation there is a lookup table with a minimum of ~14.2 MHz. A configured clock below these thresholds makes reliable USB timing impossible, so the driver panics.","triggerScenarios":"Creating/configuring the USBHS peripheral with `Config` speed set to HIGH_SPEED while the AHB clock is < 30 MHz (hits the assert with the fuller message), or FULL_SPEED_EXTERNAL/FULL_SPEED_INTERNAL with AHB frequency below 14.2 MHz (hits the table's 0..=14_199_999 arm).","commonSituations":"Clock tree misconfiguration on i.MX RT chips where the AHB divider is too high; running USBHS off a default reset clock; changing board clock init after enabling USB.","solutions":["Increase the AHB clock frequency in your clock initialization to ≥ 30 MHz for high-speed USB (≥ 14.2 MHz minimum for full speed).","Reduce the AHB clock divider in the CCM configuration.","If the clock cannot be raised, use a lower USB speed mode that the current frequency supports (per the TRDT lookup table)."],"exampleFix":"// before (board clock init)\nlet mut ccm = CCM::new(...);\nccm.set_ahb_divider(6); // AHB ends up ~12 MHz\n// after\nccm.set_ahb_divider(2); // AHB >= 30 MHz, satisfies USBHS TRDT requirement","handlingStrategy":"validation","validationCode":"let ahb_freq = clocks.ahb().raw();\nassert!(ahb_freq >= 30_000_000, \"AHB {} Hz too low for USBHS high speed\", ahb_freq);","typeGuard":"fn usbhs_ok(ahb_hz: u32, high_speed: bool) -> bool {\n    if high_speed { ahb_hz >= 30_000_000 } else { ahb_hz >= 14_200_000 }\n}","tryCatchPattern":null,"preventionTips":["Initialize the clock tree before constructing the USB peripheral and log the resulting AHB frequency.","Centralize clock setup in a board crate so USB cannot be built with a half-configured clock.","Check the i.MX RT CCM divider settings whenever changing CPU frequency scaling."],"tags":["embedded","usb","clock-config","nxp","panic"],"backgroundTag":"value-out-of-range","analyzedSha":"463a07b963419a1bfe61d5d597c44acb810afb8b","analyzedAt":"2026-09-10T13:38:26.660Z","contentChangedAt":"2026-09-10T13:38:26.660Z","schemaVersion":2},"datasetVersion":"2026-09-16T04:17:20.429Z"}