{"record":{"id":"9b6d0e9cb7d88c54","repo":"embassy-rs/embassy","slug":"pll-is-unavailable-in-voltage-range-4","errorCode":null,"errorMessage":"PLL is unavailable in voltage range 4","messagePattern":"PLL is unavailable in voltage range 4","errorType":"panic","errorClass":null,"httpStatus":null,"severity":"error","filePath":"embassy-stm32/src/rcc/u5.rs","lineNumber":633,"sourceCode":"\n    let src_freq = match pll.source {\n        PllSource::Disable => panic!(\"must not select PLL source as DISABLE\"),\n        PllSource::Hse => unwrap!(input.hse),\n        PllSource::Hsi => unwrap!(input.hsi),\n        PllSource::Msis => unwrap!(input.msi),\n    };\n\n    // Calculate the reference clock, which is the source divided by m\n    let ref_freq = src_freq / pll.prediv;\n    // Check limits per RM0456 § 11.4.6\n    assert!(Hertz::mhz(4) <= ref_freq && ref_freq <= Hertz::mhz(16));\n\n    // Check PLL clocks per RM0456 § 11.4.10\n    let (vco_min, vco_max, out_max) = match voltage_range {\n        VoltageScale::Range1 => (Hertz::mhz(128), Hertz::mhz(544), Hertz::mhz(208)),\n        VoltageScale::Range2 => (Hertz::mhz(128), Hertz::mhz(544), Hertz::mhz(110)),\n        VoltageScale::Range3 => (Hertz::mhz(128), Hertz::mhz(330), Hertz::mhz(55)),\n        VoltageScale::Range4 => panic!(\"PLL is unavailable in voltage range 4\"),\n    };\n\n    // Calculate the PLL VCO clock\n    let vco_freq = ref_freq * pll.mul;\n    assert!(vco_freq >= vco_min && vco_freq <= vco_max);\n\n    // Calculate output clocks.\n    let p = pll.divp.map(|div| vco_freq / div);\n    let q = pll.divq.map(|div| vco_freq / div);\n    let r = pll.divr.map(|div| vco_freq / div);\n    for freq in [p, q, r] {\n        if let Some(freq) = freq {\n            assert!(freq <= out_max);\n        }\n    }\n\n    let divr = match instance {\n        PllInstance::Pll1 => RCC.pll1divr(),","sourceCodeStart":615,"sourceCodeEnd":651,"githubUrl":"https://github.com/embassy-rs/embassy/blob/463a07b963419a1bfe61d5d597c44acb810afb8b/embassy-stm32/src/rcc/u5.rs#L615-L651","documentation":"Per RM0456 §11.4.10, the STM32U5 PLL cannot run when the core voltage scaling is Range 4 (lowest power, lowest max frequency). embassy-stm32's init_pll enforces this and panics if a PLL is requested while voltage_range is VoltageScale::Range4.","triggerScenarios":"rcc init with config.voltage_range = VoltageScale::Range4 and any PLL1/PLL2/PLL3 configured (PLL source Some).","commonSituations":"Choosing Range4 for low-power operation while still needing a PLL-derived clock (e.g. for USB or a high sysclk); copying a config that sets Range4 but leaves PLLs enabled.","solutions":["Change config.voltage_range to Range1, Range2, or Range3 (checking VCO 128–544/330 MHz and output limits for the range)","Or remove/disable all PLL configurations to run legitimately in Range4","Verify VCO and PLL output frequencies against the selected range's limits (vco 128–544 MHz R1/R2, 128–330 MHz R3; out max 208/110/55 MHz)"],"exampleFix":"// before\nconfig.voltage_range = VoltageScale::Range4;\nconfig.pll1 = Some(PllConfig { source: PllSource::Hsi, ... }); // panic\n// after\nconfig.voltage_range = VoltageScale::Range1; // or Range2/Range3 as power budget allows\nconfig.pll1 = Some(PllConfig { source: PllSource::Hsi, ... });","handlingStrategy":"validation","validationCode":"if config.pll1.is_some() || config.pll2.is_some() || config.pll3.is_some() {\n    assert!(config.voltage_range != VoltageScale::Range4, \"PLL unavailable in Range 4\");\n}\n// also check VCO/output limits per range:\n// Range1/2: VCO 128-544 MHz, out <=208/110 MHz; Range3: VCO 128-330 MHz, out <=55 MHz","typeGuard":"fn pll_ok_in_range(range: VoltageScale, has_pll: bool) -> bool {\n    !has_pll || !matches!(range, VoltageScale::Range4)\n}","tryCatchPattern":null,"preventionTips":["Never combine VoltageScale::Range4 with any PLL config","Consult RM0456 §11.4.10 limits when choosing voltage range","For low power with PLL needed, use Range3 instead of Range4","Validate VCO and PLL output against range-specific maxima"],"tags":["rust","embedded","stm32","rcc","pll","voltage-scaling"],"backgroundTag":"unsupported-config-value","analyzedSha":"463a07b963419a1bfe61d5d597c44acb810afb8b","analyzedAt":"2026-09-10T13:38:26.660Z","contentChangedAt":"2026-09-10T13:38:26.660Z","schemaVersion":2},"datasetVersion":"2026-09-16T04:17:20.429Z"}