{"record":{"id":"a5360437617eac66","repo":"embassy-rs/embassy","slug":"when-the-msi-is-used-as-cpu-system-bus-clock-or-cl","errorCode":null,"errorMessage":"When the MSI is used as cpu/system bus clock or clock source for any PLL, it is not allowed to be disabled","messagePattern":"When the MSI is used as cpu/system bus clock or clock source for any PLL, it is not allowed to be disabled","errorType":"panic","errorClass":null,"httpStatus":null,"severity":"error","filePath":"embassy-stm32/src/rcc/n6.rs","lineNumber":1027,"sourceCode":"    debug!(\"configuring MSI\");\n    let msi = if let Some(msi) = config.msi {\n        RCC.msicfgr().modify(|w| w.set_msifreqsel(msi.freq));\n        RCC.csr().write(|w| w.set_msions(true));\n        while !RCC.sr().read().msirdy() {}\n        RCC.msicfgr().modify(|w| w.set_msitrim(msi.trim));\n\n        Some(match msi.freq {\n            Msifreqsel::_4mhz => Hertz::mhz(4),\n            Msifreqsel::_16mhz => Hertz::mhz(16),\n        })\n    } else if cpu_src == Cpusws::Msi\n        || sys_src == Syssws::Msi\n        || (pll1_src == Pllsel::Msi && rcc_sr.pllrdy(0))\n        || (pll2_src == Pllsel::Msi && rcc_sr.pllrdy(1))\n        || (pll3_src == Pllsel::Msi && rcc_sr.pllrdy(2))\n        || (pll4_src == Pllsel::Msi && rcc_sr.pllrdy(3))\n    {\n        panic!(\n            \"When the MSI is used as cpu/system bus clock or clock source for any PLL, it is not allowed to be disabled\"\n        );\n    } else {\n        RCC.ccr().write(|w| w.set_msionc(true));\n        while RCC.sr().read().msirdy() {}\n\n        None\n    };\n\n    // rtc configuration\n    let rtc = config.ls.init();\n    // lse configuration\n    debug!(\"configuring LSE\");\n    let lse = config.ls.lse.map(|l| l.frequency);\n    // lsi configuration\n    debug!(\"configuring LSI\");\n    let lsi = config.ls.lsi.then_some(LSI_FREQ);\n","sourceCodeStart":1009,"sourceCodeEnd":1045,"githubUrl":"https://github.com/embassy-rs/embassy/blob/463a07b963419a1bfe61d5d597c44acb810afb8b/embassy-stm32/src/rcc/n6.rs#L1009-L1045","documentation":"Mirror of errors 254/255 for MSI: on STM32N6 the driver panics if an MSI-disable request arrives while MSI is the cpu/system bus clock or the ready input of any running PLL. Disabling would immediately break the active system clock, so the library treats it as a configuration bug.","triggerScenarios":"Calling the MSI-off path while sys source is MSI, or PLL1-PLL4 running (pllrdy set) with Pllsel::Msi input.","commonSituations":"Low-power sequences that disable MSI unconditionally; switching sysclk away but forgetting a PLL still uses MSI; MSI-based configs (common on L-series-style code) ported to N6 with a PLL also on MSI.","solutions":["Switch sysclk and stop all MSI-fed PLLs before disabling MSI","Omit the MSI-disable step if MSI is still needed (e.g. for LSE-backed auto-calibration or as a wake clock)","Order the shutdown: PLLs off, sysclk switched, then MSI off"],"exampleFix":"// before\ndisable_msi(); // PLL2 still running off MSI\n// after\nstop_pll(1);\nswitch_sysclk_to_hsi();\ndisable_msi();","handlingStrategy":"validation","validationCode":"fn msi_in_use() -> bool {\n    sysclk_is(Syssws::Msi) || (0..4).any(|n| pll_ready(n) && pll_source(n) == Pllsel::Msi)\n}\nassert!(!msi_in_use(), \"MSI still clocks sys or a PLL\");","typeGuard":null,"tryCatchPattern":null,"preventionTips":["Disable dependent PLLs before turning MSI off","Keep MSI if low-power wake or MSIx auto-calibration still needs it","Order shutdown: PLLs off -> sysclk switched -> MSI off"],"tags":["rust","embedded","rcc","msi","stm32n6","clock-config"],"backgroundTag":"conflicting-config-options","analyzedSha":"463a07b963419a1bfe61d5d597c44acb810afb8b","analyzedAt":"2026-09-10T13:38:26.660Z","contentChangedAt":"2026-09-10T13:38:26.660Z","schemaVersion":2},"datasetVersion":"2026-09-16T04:17:20.429Z"}