{"record":{"id":"ad2b2a80a7e68aae","repo":"go-delve/delve","slug":"could-not-set-register-s-not-found","errorCode":null,"errorMessage":"could not set register %s: not found","messagePattern":"could not set register (.+?): not found","errorType":"exception","errorClass":null,"httpStatus":null,"severity":"error","filePath":"pkg/proc/gdbserial/gdbserver.go","lineNumber":2099,"sourceCode":"\t\tgdbreg, ok = t.regs.regs[\"y\"+regName[1:]]\n\t\tif !ok {\n\t\t\tgdbreg, ok = t.regs.regs[\"z\"+regName[1:]]\n\t\t}\n\t}\n\tif !ok && t.p.bi.Arch.Name == \"arm64\" && regName == \"x30\" {\n\t\tgdbreg, ok = t.regs.regs[\"lr\"]\n\t}\n\tif !ok && regName == \"rflags\" {\n\t\t// rr has eflags instead of rflags\n\t\tregName = \"eflags\"\n\t\tgdbreg, ok = t.regs.regs[regName]\n\t\tif ok {\n\t\t\treg.FillBytes()\n\t\t\treg.Bytes = reg.Bytes[:4]\n\t\t}\n\t}\n\tif !ok {\n\t\treturn fmt.Errorf(\"could not set register %s: not found\", regName)\n\t}\n\treg.FillBytes()\n\n\twrongSizeErr := func(n int) error {\n\t\treturn fmt.Errorf(\"could not set register %s: wrong size, expected %d got %d\", regName, n, len(reg.Bytes))\n\t}\n\n\tif len(reg.Bytes) == len(gdbreg.value) {\n\t\tcopy(gdbreg.value, reg.Bytes)\n\t\terr := t.p.conn.writeRegister(t.strID, gdbreg.regnum, gdbreg.value)\n\t\tif err != nil {\n\t\t\treturn err\n\t\t}\n\t\tif t.p.conn.workaroundReg != nil && len(gdbreg.value) > 16 {\n\t\t\t// This is a workaround for a bug in debugserver where register writes (P\n\t\t\t// packet) on AVX-2 and AVX-512 registers are ignored unless they are\n\t\t\t// followed by a write to an AVX register.\n\t\t\t// See:","sourceCodeStart":2081,"sourceCodeEnd":2117,"githubUrl":"https://github.com/go-delve/delve/blob/a23773e6c31361e43246bc43a424ee009679b174/pkg/proc/gdbserial/gdbserver.go#L2081-L2117","documentation":"SetReg looks up the register name in the thread's register map (t.regs.regs, populated from target.xml/qRegisterInfo at handshake). If the name is absent, the register cannot be written and this error is returned.","triggerScenarios":"Writing a register whose name is not exposed by the stub's target.xml or qRegisterInfo — e.g. writing an architecture-specific register (x87/SSE/debug regs) on a stub that does not list it, or a typo'd/renamed register between architectures.","commonSituations":"Using a stub that exposes a reduced register set (minimal target.xml); mixed-architecture remote debugging where the register name differs (e.g. rip vs pc); stubs built without FPU/debug-register descriptions.","solutions":["Verify the register name against the stub's target.xml (fetch qXfer:features:read) or qRegisterInfo output","Use a stub with a complete target.xml for your architecture (recent gdbserver)","Do not attempt to write registers unsupported by the stub; guard code by checking availability first","Update Delve if the register-name mapping for your architecture is outdated"],"exampleFix":null,"handlingStrategy":"validation","validationCode":"// check the register exists before writing:\n_, err := thread.Registers()\nhasReg := func(regs proc.Registers, name string) bool {\n    for _, r := range regs.Slice(false) { if r.Name == name { return true } }\n    return false\n}","typeGuard":null,"tryCatchPattern":"err := thread.SetReg(reg)\nif err != nil && strings.Contains(err.Error(), \"not found\") {\n    return fmt.Errorf(\"stub does not expose register %q: %w\", reg.Name, err)\n}","preventionTips":["Fetch and inspect the stub's target.xml to know the writable register set","Match stub architecture to the inferior architecture","Skip writes for registers absent from the stub's register list","Use current gdbserver/lldb-server builds with full register descriptions"],"tags":["gdbserial","register","gdb-remote"],"backgroundTag":"register-not-found","analyzedSha":"a23773e6c31361e43246bc43a424ee009679b174","analyzedAt":"2026-08-31T15:12:45.221Z","schemaVersion":2},"datasetVersion":"2026-08-31T19:17:28.585Z"}