{"record":{"id":"b731c0d6768454f9","repo":"jax-ml/jax","slug":"lite-chips-single-core-chips-and-dual-core-chips","errorCode":null,"errorMessage":"Lite chips, single core chips, and dual-core chips that do not support Megacore must have num_tensor_cores_per_logical_device=1, but got {num_tensor_cores_per_logical_device}.","messagePattern":"Lite chips, single core chips, and dual-core chips that do not support Megacore must have num_tensor_cores_per_logical_device=1, but got (.+?)\\.","errorType":"exception","errorClass":"ValueError","httpStatus":null,"severity":"error","filePath":"jax/_src/tpu_info.py","lineNumber":612,"sourceCode":"      device in the requested configuration. Should be 1 for single-core chips\n      (TPU_V4I, TPU_V5E, TPU_V6E). For dual-core chips that support Megacore\n      (TPU_V4, TPU_V5P), this can be 2 (Megacore mode) or 1 (split mode). For\n      dual-core chips that do not support Megacore (TPU_V2, TPU_V3, TPU_7X),\n      this must be 1.\n  \"\"\"\n  if (\n      chip_version.is_lite\n      or chip_version\n      in {\n          ChipVersion.TPU_V2,\n          ChipVersion.TPU_V3,\n          ChipVersion.TPU_7,\n          ChipVersion.TPU_7X,\n          ChipVersion.TPU_8I,\n          ChipVersion.TPU_8T,\n      }\n  ) and num_tensor_cores_per_logical_device != 1:\n    raise ValueError(\n        \"Lite chips, single core chips, and dual-core chips that do not support\"\n        \" Megacore must have num_tensor_cores_per_logical_device=1, but got\"\n        f\" {num_tensor_cores_per_logical_device}.\"\n    )\n\n  return _get_tpu_info_impl(chip_version, num_tensor_cores_per_logical_device)\n\n\n# TODO(sharadmv): Generalize Tiling to capture the various options\n# (compact 2nd minor, large 2nd minor, regular tiling)\nclass Tiling(enum.Enum):\n  COMPACT = enum.auto()\n  SPARSE_CORE = enum.auto()\n\n  @property\n  def shape(self) -> tuple[int, ...]:\n    # TODO(slebedev): Use ``get_tpu_info()`` instead of hardcoding the values.\n    match self:","sourceCodeStart":594,"sourceCodeEnd":630,"githubUrl":"https://github.com/jax-ml/jax/blob/1e1c6a8fc06dfcd1247076ec5cae4640cea5d7bb/jax/_src/tpu_info.py#L594-L630","documentation":"get_tpu_info_for_chip validates that lite, single-core, and non-Megacore dual-core chips must have num_tensor_cores_per_logical_device=1, but a different value was supplied.","triggerScenarios":"Calling get_tpu_info_for_chip(chip, num_tensor_cores_per_logical_device=2) for chips like TPU v4 lite / v5e / single-core variants.","commonSituations":"Manually constructing TpuInfo for testing or simulation with wrong core counts; copy-pasting v4 (Megacore) config.","solutions":["Pass num_tensor_cores_per_logical_device=1 for such chips","Use the default device-derived value instead of a manual one"],"exampleFix":"# before\ninfo = get_tpu_info_for_chip(ChipVersion.TPU_5E, 2)\n# after\ninfo = get_tpu_info_for_chip(ChipVersion.TPU_5E, 1)","handlingStrategy":"validation","validationCode":"SINGLE_CORE = {ChipVersion.TPU_4_LITE, ChipVersion.TPU_5E, ...}\nif chip in SINGLE_CORE:\n    num_tensor_cores_per_logical_device = 1","typeGuard":null,"tryCatchPattern":null,"preventionTips":["Don't override core counts manually; derive from device","Keep per-chip configs in a validated table"],"tags":["tpu","chip-config","megacore","validation","jax"],"backgroundTag":"invalid-configuration-value","analyzedSha":"1e1c6a8fc06dfcd1247076ec5cae4640cea5d7bb","analyzedAt":"2026-08-27T09:53:25.647Z","schemaVersion":2},"datasetVersion":"2026-08-27T13:17:12.746Z"}