{"record":{"id":"c1d500d32738be9a","repo":"embassy-rs/embassy","slug":"dma-error-on-dma-0-channel","errorCode":null,"errorMessage":"DMA: error on DMA_0 channel {}","messagePattern":"DMA: error on DMA_0 channel (.+?)","errorType":"panic","errorClass":null,"httpStatus":null,"severity":"critical","filePath":"embassy-nxp/src/dma/lpc55.rs","lineNumber":25,"sourceCode":"use core::task::{Context, Poll};\n\nuse critical_section::Mutex;\nuse embassy_hal_internal::interrupt::InterruptExt;\nuse embassy_hal_internal::{PeripheralType, impl_peripheral};\nuse embassy_sync::waitqueue::AtomicWaker;\n\nuse crate::Peri;\n#[cfg(feature = \"rt\")]\nuse crate::pac::interrupt;\nuse crate::pac::{SYSCON, *};\n\n#[cfg(feature = \"rt\")]\n#[interrupt]\nfn DMA0() {\n    let inta = DMA0.inta0().read().ia();\n    for channel in 0..CHANNEL_COUNT {\n        if (DMA0.errint0().read().err() & (1 << channel)) != 0 {\n            panic!(\"DMA: error on DMA_0 channel {}\", channel);\n        }\n\n        if (inta & (1 << channel)) != 0 {\n            CHANNEL_WAKERS[channel].wake();\n            DMA0.inta0().modify(|w| w.set_ia(1 << channel));\n        }\n    }\n}\n\npub(crate) fn init() {\n    assert_eq!(core::mem::size_of::<DmaDescriptor>(), 16, \"Descriptor must be 16 bytes\");\n    assert_eq!(\n        core::mem::align_of::<DmaDescriptor>(),\n        16,\n        \"Descriptor must be 16-byte aligned\"\n    );\n    assert_eq!(\n        core::mem::align_of::<DmaDescriptorTable>(),","sourceCodeStart":7,"sourceCodeEnd":43,"githubUrl":"https://github.com/embassy-rs/embassy/blob/463a07b963419a1bfe61d5d597c44acb810afb8b/embassy-nxp/src/dma/lpc55.rs#L7-L43","documentation":"In the LPC55 DMA interrupt handler, each channel with an error bit set in `errint0` causes an immediate panic naming the failing channel. DMA transfer errors (bus errors, invalid descriptors) on LPC55 are treated as unrecoverable by this driver rather than returned to the application. The panic aborts the firmware at the point of the interrupt.","triggerScenarios":"A DMA transfer on DMA_0 encounters a hardware error (source/destination bus fault, misaligned or invalid transfer configuration, descriptor issue); the DMA0 IRQ fires, the handler scans `errint0` and finds the error bit for the channel.","commonSituations":"DMA-ing from/to a peripheral or memory region that is not accessible (wrong address, powered-down peripheral); buffer in uncacheable/invalid memory; race where the transfer is configured with a zero length or bad burst settings; hardware fault on the bus.","solutions":["Identify the failing channel from the panic message and audit what transfer that channel was running (addresses, lengths, peripheral).","Validate the source/destination addresses and buffer sizes passed to the DMA transfer API before starting it.","Ensure the source peripheral is powered/clocked and its DMA requests are correctly wired in your init code.","Update embassy-nxp in case the driver has gained proper error handling (Result-returning transfers) since your version."],"exampleFix":"// before\nlet dma_channel = p.DMA0_CH0.into();\ndma_channel.read(&mut weird_ptr as *mut u8, &mut buf).await; // invalid address -> bus error\n// after\nassert!(core::ptr::addr_of!(buf).is_aligned());\ndma_channel.read(&mut peripheral_rx_addr, &mut buf).await; // valid mapped peripheral address","handlingStrategy":"validation","validationCode":"// Before issuing a DMA transfer, validate addresses and lengths:\nfn dma_transfer_ok(src: *const u8, dst: *mut u8, len: usize) -> bool {\n    !src.is_null() && !dst.is_null() && len > 0\n        && (src as usize) >= 0x0000_0000 && (dst as usize) < 0x2000_0000\n        // plus peripheral-region checks per your memory map\n}","typeGuard":null,"tryCatchPattern":"// The driver panics in the IRQ; errors cannot be caught at runtime.\n// Mitigate by pre-validating every transfer configuration before .await:","preventionTips":["Validate DMA buffer addresses, alignment, and sizes against the LPC55 memory map before starting transfers.","Ensure source peripherals are clocked and powered before DMA requests arrive.","Keep DMA channel usage documented per channel so a panic message maps immediately to a code path."],"tags":["embedded","dma","lpc55","nxp","interrupt","panic"],"backgroundTag":"dma-transfer-error","analyzedSha":"463a07b963419a1bfe61d5d597c44acb810afb8b","analyzedAt":"2026-09-10T13:38:26.660Z","contentChangedAt":"2026-09-10T13:38:26.660Z","schemaVersion":2},"datasetVersion":"2026-09-16T04:17:20.429Z"}