{"record":{"id":"cac527fc21310eef","repo":"go-delve/delve","slug":"could-not-get-floating-point-registers","errorCode":null,"errorMessage":"could not get floating point registers","messagePattern":"could not get floating point registers","errorType":"exception","errorClass":null,"httpStatus":null,"severity":"error","filePath":"pkg/proc/native/registers_darwin_amd64.go","lineNumber":344,"sourceCode":"\t\tr10:    uint64(state.__r10),\n\t\tr11:    uint64(state.__r11),\n\t\tr12:    uint64(state.__r12),\n\t\tr13:    uint64(state.__r13),\n\t\tr14:    uint64(state.__r14),\n\t\tr15:    uint64(state.__r15),\n\t\trip:    uint64(state.__rip),\n\t\trflags: uint64(state.__rflags),\n\t\tcs:     uint64(state.__cs),\n\t\tfs:     uint64(state.__fs),\n\t\tgs:     uint64(state.__gs),\n\t\tgsBase: uint64(identity.thread_handle),\n\t}\n\n\t// https://opensource.apple.com/source/xnu/xnu-792.13.8/osfmk/mach/i386/thread_status.h?txt\n\tvar fpstate C.x86_float_state64_t\n\tkret = C.get_fpu_registers(C.mach_port_name_t(thread.os.threadAct), &fpstate)\n\tif kret != C.KERN_SUCCESS {\n\t\treturn nil, fmt.Errorf(\"could not get floating point registers\")\n\t}\n\n\tregs.fpregs = proc.AppendUint64Register(regs.fpregs, \"CW\", uint64(*((*uint16)(unsafe.Pointer(&fpstate.__fpu_fcw)))))\n\tregs.fpregs = proc.AppendUint64Register(regs.fpregs, \"SW\", uint64(*((*uint16)(unsafe.Pointer(&fpstate.__fpu_fsw)))))\n\tregs.fpregs = proc.AppendUint64Register(regs.fpregs, \"TW\", uint64(fpstate.__fpu_ftw))\n\tregs.fpregs = proc.AppendUint64Register(regs.fpregs, \"FOP\", uint64(fpstate.__fpu_fop))\n\tregs.fpregs = proc.AppendUint64Register(regs.fpregs, \"FIP\", uint64(fpstate.__fpu_cs)<<32|uint64(fpstate.__fpu_ip))\n\tregs.fpregs = proc.AppendUint64Register(regs.fpregs, \"FDP\", uint64(fpstate.__fpu_ds)<<32|uint64(fpstate.__fpu_dp))\n\n\tfor i, st := range []*C.char{&fpstate.__fpu_stmm0.__mmst_reg[0], &fpstate.__fpu_stmm1.__mmst_reg[0], &fpstate.__fpu_stmm2.__mmst_reg[0], &fpstate.__fpu_stmm3.__mmst_reg[0], &fpstate.__fpu_stmm4.__mmst_reg[0], &fpstate.__fpu_stmm5.__mmst_reg[0], &fpstate.__fpu_stmm6.__mmst_reg[0], &fpstate.__fpu_stmm7.__mmst_reg[0]} {\n\t\tstb := C.GoBytes(unsafe.Pointer(st), 10)\n\t\tregs.fpregs = proc.AppendBytesRegister(regs.fpregs, fmt.Sprintf(\"ST(%d)\", i), stb)\n\t}\n\n\tregs.fpregs = proc.AppendUint64Register(regs.fpregs, \"MXCSR\", uint64(fpstate.__fpu_mxcsr))\n\tregs.fpregs = proc.AppendUint64Register(regs.fpregs, \"MXCSR_MASK\", uint64(fpstate.__fpu_mxcsrmask))\n\n\tfor i, xmm := range []*C.char{&fpstate.__fpu_xmm0.__xmm_reg[0], &fpstate.__fpu_xmm1.__xmm_reg[0], &fpstate.__fpu_xmm2.__xmm_reg[0], &fpstate.__fpu_xmm3.__xmm_reg[0], &fpstate.__fpu_xmm4.__xmm_reg[0], &fpstate.__fpu_xmm5.__xmm_reg[0], &fpstate.__fpu_xmm6.__xmm_reg[0], &fpstate.__fpu_xmm7.__xmm_reg[0], &fpstate.__fpu_xmm8.__xmm_reg[0], &fpstate.__fpu_xmm9.__xmm_reg[0], &fpstate.__fpu_xmm10.__xmm_reg[0], &fpstate.__fpu_xmm11.__xmm_reg[0], &fpstate.__fpu_xmm12.__xmm_reg[0], &fpstate.__fpu_xmm13.__xmm_reg[0], &fpstate.__fpu_xmm14.__xmm_reg[0], &fpstate.__fpu_xmm15.__xmm_reg[0]} {","sourceCodeStart":326,"sourceCodeEnd":362,"githubUrl":"https://github.com/go-delve/delve/blob/a23773e6c31361e43246bc43a424ee009679b174/pkg/proc/native/registers_darwin_amd64.go#L326-L362","documentation":"Error \"could not get floating point registers\" thrown in go-delve/delve.","triggerScenarios":"Thrown at pkg/proc/native/registers_darwin_amd64.go:344 when the library encounters an invalid state.","commonSituations":"See trigger scenarios.","solutions":[],"exampleFix":null,"handlingStrategy":null,"validationCode":null,"typeGuard":null,"tryCatchPattern":null,"preventionTips":[],"tags":[],"backgroundTag":null,"analyzedSha":"a23773e6c31361e43246bc43a424ee009679b174","analyzedAt":"2026-08-31T15:12:45.221Z","schemaVersion":2},"datasetVersion":"2026-08-31T19:17:28.585Z"}