{"record":{"id":"cfcb540b60b53352","repo":"sgl-project/sglang","slug":"m-must-be-64-128-or-256","errorCode":null,"errorMessage":"M must be 64, 128 or 256","messagePattern":"M must be 64, 128 or 256","errorType":"validation","errorClass":"ValueError","httpStatus":null,"severity":"error","filePath":"python/sglang/kernels/ops/attention/flash_attn/cute/mma_sm100_desc.py","lineNumber":139,"sourceCode":"    a_neg: ScaleIn = ScaleIn.One,\n    b_neg: ScaleIn = ScaleIn.One,\n    c_sat: Saturate = Saturate.False_,\n    is_sparse: bool = False,\n    max_shift: MaxShift = MaxShift.NoShift,\n) -> int:\n    \"\"\"\n    Build the 32-bit instruction descriptor for Blackwell MMA.\n    All matrix/accumulator **types must be CUTLASS scalar classes** –\n    passing integers is forbidden.\n    \"\"\"\n    # --- encode element formats -------------------------------------------------\n    a_fmt = int(to_UMMA_format(a_type))\n    b_fmt = int(to_UMMA_format(b_type))\n    c_fmt = int(to_C_format(c_type))\n\n    # --- range checks on M/N -----------------------------------------------------\n    if M not in (64, 128, 256):\n        raise ValueError(\"M must be 64, 128 or 256\")\n    if N < 8 or N > 256 or (N & 7):\n        raise ValueError(\"N must be a multiple of 8 in the range 8…256\")\n\n    m_dim = M >> 4  # 5-bit field\n    n_dim = N >> 3  # 6-bit field\n\n    # fmt: off\n    # --- pack the bit-fields -----------------------------------------------------\n    desc = 0\n    desc |= (0                 & 0x3) << 0        # sparse_id2 (always 0 here)\n    desc |= (int(is_sparse)    & 0x1) << 2        # sparse_flag\n    desc |= (int(c_sat)        & 0x1) << 3        # saturate\n    desc |= (c_fmt             & 0x3) << 4        # c_format\n    desc |= (a_fmt             & 0x7) << 7        # a_format\n    desc |= (b_fmt             & 0x7) << 10       # b_format\n    desc |= (int(a_neg)        & 0x1) << 13       # a_negate\n    desc |= (int(b_neg)        & 0x1) << 14       # b_negate\n    desc |= (int(a_major)      & 0x1) << 15       # a_major","sourceCodeStart":121,"sourceCodeEnd":157,"githubUrl":"https://github.com/sgl-project/sglang/blob/0132848349585cfe6aae51c4941cbae872505f8a/python/sglang/kernels/ops/attention/flash_attn/cute/mma_sm100_desc.py#L121-L157","documentation":"make_instr_desc encodes the UMMA instruction M dimension into a 5-bit descriptor field that only represents M values of 64, 128 and 256. Any other M raises this ValueError before the bit-packing step.","triggerScenarios":"Calling make_instr_desc(M=32, ...) or M=96/192 or any value outside (64, 128, 256); typically when deriving M from a tile shape that is not a legal UMMA atom size.","commonSituations":"Porting SM90 tile configurations to SM100; deriving the MMA M from an arbitrary GEMM tile_m without snapping it to a legal UMMA atom.","solutions":["Snap your tile M to 64, 128, or 256 (e.g. use 128 as the default atom).","If a smaller logical M is needed, use a larger atom and mask/predicate the unused rows.","Check the caller (mma_op_to_idesc) to confirm which dimension of your instruction maps to descriptor M."],"exampleFix":null,"handlingStrategy":"validation","validationCode":"assert M in (64, 128, 256), f\"M={M} is not a legal UMMA M\"","typeGuard":null,"tryCatchPattern":null,"preventionTips":["Derive M only from sanctioned tile atoms (64/128/256).","Add shape asserts in kernel wrappers so bad tiles fail loudly before descriptor packing."],"tags":["cutlass","sm100","mma","tile-shape"],"backgroundTag":"invalid-mma-tile-shape","analyzedSha":"0132848349585cfe6aae51c4941cbae872505f8a","analyzedAt":"2026-08-28T05:10:05.995Z","schemaVersion":2},"datasetVersion":"2026-08-28T06:17:29.519Z"}