{"record":{"id":"d1482393f3ea04f6","repo":"golang/go","slug":"loong64-extension-invalid-lsx-lasx-arrangement-ty","errorCode":null,"errorMessage":"Loong64 extension: invalid LSX/LASX arrangement type: {ext}","messagePattern":"Loong64 extension: invalid LSX/LASX arrangement type: (.+?)","errorType":"exception","errorClass":null,"httpStatus":null,"severity":"error","filePath":"src/cmd/asm/internal/arch/loong64.go","lineNumber":96,"sourceCode":"\tvar arngType int16\n\tvar simdType int16\n\tvar simdReg int16\n\n\tswitch {\n\tcase reg >= loong64.REG_V0 && reg <= loong64.REG_V31:\n\t\tsimdType = loong64.LSX\n\t\tsimdReg = reg - loong64.REG_V0\n\tcase reg >= loong64.REG_X0 && reg <= loong64.REG_X31:\n\t\tsimdType = loong64.LASX\n\t\tsimdReg = reg - loong64.REG_X0\n\tdefault:\n\t\treturn errors.New(\"Loong64 extension: invalid LSX/LASX register: \" + fmt.Sprintf(\"%d\", reg))\n\t}\n\n\tif isIndex {\n\t\tarngType, ok = loong64ElemExtMap[ext]\n\t\tif !ok {\n\t\t\treturn errors.New(\"Loong64 extension: invalid LSX/LASX arrangement type: \" + ext)\n\t\t}\n\n\t\ta.Reg = loong64.REG_ELEM\n\t\ta.Reg += ((simdReg & loong64.EXT_REG_MASK) << loong64.EXT_REG_SHIFT)\n\t\ta.Reg += ((arngType & loong64.EXT_TYPE_MASK) << loong64.EXT_TYPE_SHIFT)\n\t\ta.Reg += ((simdType & loong64.EXT_SIMDTYPE_MASK) << loong64.EXT_SIMDTYPE_SHIFT)\n\t\ta.Index = num\n\t} else {\n\t\tswitch simdType {\n\t\tcase loong64.LSX:\n\t\t\tarngType, ok = loong64LsxArngExtMap[ext]\n\t\t\tif !ok {\n\t\t\t\treturn errors.New(\"Loong64 extension: invalid LSX arrangement type: \" + ext)\n\t\t\t}\n\n\t\tcase loong64.LASX:\n\t\t\tarngType, ok = loong64LasxArngExtMap[ext]\n\t\t\tif !ok {","sourceCodeStart":78,"sourceCodeEnd":114,"githubUrl":"https://github.com/golang/go/blob/b6b368adc57c96c3151d224d172029f233ead2c3/src/cmd/asm/internal/arch/loong64.go#L78-L114","documentation":"Thrown by Loong64RegisterExtension when an LSX/LASX register is used in an index (element-access) context but the extension string `ext` is not a key in loong64ElemExtMap. The index-branch only accepts the eight element-type suffixes B, H, W, V, BU, HU, WU, VU; anything else (including a valid arrangement suffix like B16) is rejected here because index access encodes an element width, not a full vector arrangement.","triggerScenarios":"Calling Loong64RegisterExtension with isIndex==true and an `ext` value absent from loong64ElemExtMap. In hand-written or generated Loong64 assembly this maps to an indexed vector operand like `V0[B]` where the bracketed suffix is not one of B/H/W/V/BU/HU/WU/VU.","commonSituations":"Authoring Loong64 SIMD assembly (LSX/LASX) and using an arrangement suffix (e.g. B16, H8) instead of an element suffix on an indexed access; typos in the element-width specifier; porting ARM SVE/NEON or RISC-V V assembly syntax that uses different suffix names.","solutions":["Change the index suffix to one of the valid element types: B, H, W, V, BU, HU, WU, or VU.","If you intended a full-vector arrangement rather than an element access, remove the index form (drop the `[N]` / isIndex usage) so the arrangement-branch (errors 61/62) applies instead.","Double-check whether the register is V0-V31 (LSX) or X0-X31 (LASX); element suffixes are shared but arrangement suffixes differ per SIMD width."],"exampleFix":"// before (invalid index suffix)\nVADDI V0.B16[0], V1, V2\n// after (valid element suffix for indexed access)\nVADDI V0.B[0], V1, V2","handlingStrategy":"validation","validationCode":"// Validate an LSX/LASX index element suffix before assembling.\nvar validElemExt = map[string]bool{\"B\":true,\"H\":true,\"W\":true,\"V\":true,\"BU\":true,\"HU\":true,\"WU\":true,\"VU\":true}\nfunc validIndexExt(ext string) bool { return validElemExt[ext] }","typeGuard":"// n/a: Loong64 assembly suffixes are strings, validated by lookup.\nfunc isValidLoong64ElemExt(ext string) bool {\n    switch ext { case \"B\",\"H\",\"W\",\"V\",\"BU\",\"HU\",\"WU\",\"VU\": return true }\n    return false\n}","tryCatchPattern":null,"preventionTips":["Keep a reference table of element vs arrangement suffixes for LSX (128-bit) and LASX (256-bit).","Run `go vet`/assembly test builds in CI for Loong64 targets to catch suffix typos early.","Differentiate indexed access (element width) from full-vector arrangement when writing operands."],"tags":["loong64","assembly","simd","lsx","lasx","assembler"],"analyzedSha":"b6b368adc57c96c3151d224d172029f233ead2c3","analyzedAt":"2026-08-12T00:22:02.250Z","schemaVersion":2},"datasetVersion":"2026-08-12T08:17:17.861Z"}