{"record":{"id":"e226cd41261898b3","repo":"golang/go","slug":"loong64-extension-invalid-lsx-lasx-register-reg","errorCode":null,"errorMessage":"Loong64 extension: invalid LSX/LASX register: {reg}","messagePattern":"Loong64 extension: invalid LSX/LASX register: (.+?)","errorType":"exception","errorClass":null,"httpStatus":null,"severity":"error","filePath":"src/cmd/asm/internal/arch/loong64.go","lineNumber":90,"sourceCode":"\t\"Q2\":  loong64.ARNG_2Q,\n}\n\n// Loong64RegisterExtension constructs an Loong64 register with extension or arrangement.\nfunc Loong64RegisterExtension(a *obj.Addr, ext string, reg, num int16, isAmount, isIndex bool) error {\n\tvar ok bool\n\tvar arngType int16\n\tvar simdType int16\n\tvar simdReg int16\n\n\tswitch {\n\tcase reg >= loong64.REG_V0 && reg <= loong64.REG_V31:\n\t\tsimdType = loong64.LSX\n\t\tsimdReg = reg - loong64.REG_V0\n\tcase reg >= loong64.REG_X0 && reg <= loong64.REG_X31:\n\t\tsimdType = loong64.LASX\n\t\tsimdReg = reg - loong64.REG_X0\n\tdefault:\n\t\treturn errors.New(\"Loong64 extension: invalid LSX/LASX register: \" + fmt.Sprintf(\"%d\", reg))\n\t}\n\n\tif isIndex {\n\t\tarngType, ok = loong64ElemExtMap[ext]\n\t\tif !ok {\n\t\t\treturn errors.New(\"Loong64 extension: invalid LSX/LASX arrangement type: \" + ext)\n\t\t}\n\n\t\ta.Reg = loong64.REG_ELEM\n\t\ta.Reg += ((simdReg & loong64.EXT_REG_MASK) << loong64.EXT_REG_SHIFT)\n\t\ta.Reg += ((arngType & loong64.EXT_TYPE_MASK) << loong64.EXT_TYPE_SHIFT)\n\t\ta.Reg += ((simdType & loong64.EXT_SIMDTYPE_MASK) << loong64.EXT_SIMDTYPE_SHIFT)\n\t\ta.Index = num\n\t} else {\n\t\tswitch simdType {\n\t\tcase loong64.LSX:\n\t\t\tarngType, ok = loong64LsxArngExtMap[ext]\n\t\t\tif !ok {","sourceCodeStart":72,"sourceCodeEnd":108,"githubUrl":"https://github.com/golang/go/blob/b6b368adc57c96c3151d224d172029f233ead2c3/src/cmd/asm/internal/arch/loong64.go#L72-L108","documentation":"The Go assembler's Loong64 arch helper Loong64RegisterExtension returns this error when the register is neither an LSX vector register (V0-V31) nor an LASX vector register (X0-X31) (loong64.go:82-91). LSX/LASX SIMD extensions require the operand to be a 128-bit (V) or 256-bit (X) SIMD register; any general-purpose, floating-point, or out-of-range register is rejected before any arrangement/extension encoding is attempted.","triggerScenarios":"Triggered when a LoongArch assembly instruction applies an LSX/LASX extension/arrangement to a non-SIMD register, e.g., `VADDI R0.B16, ...` (R is GPR) or `XVADD F0.B32, ...` (F is FPR). The switch at loong64.go:82-90 only matches REG_V0..V31 and REG_X0..X31; everything else hits the default branch.","commonSituations":"Hand-written LoongArch assembly (.s files) targeting LSX (V registers) or LASX (X registers) but using R (GPR) or F (FPR) operands with a SIMD arrangement suffix. Porting LoongArch assembly from GNU as syntax where register naming differs. Typos in the register prefix (e.g., 'W' instead of 'X').","solutions":["Use V0-V31 for LSX instructions or X0-X31 for LASX instructions as the SIMD operand.","If the operation is scalar, remove the SIMD arrangement/extension suffix and use the scalar instruction form.","Verify the register prefix against the LoongArch ISA: V = LSX 128-bit, X = LASX 256-bit.","Check the .s file line cited by the assembler error and correct the register name."],"exampleFix":"; before — GPR used with SIMD arrangement\nVADD.B R0, R1, R2\n\n; after — use LSX vector registers\nVADD.B V0, V1, V2","handlingStrategy":"validation","validationCode":"// Validate the register is an LSX (V) or LASX (X) SIMD register.\nfunc validLoong64SimdReg(reg int16) bool {\n    return (reg >= loong64.REG_V0 && reg <= loong64.REG_V31) ||\n        (reg >= loong64.REG_X0 && reg <= loong64.REG_X31)\n}","typeGuard":null,"tryCatchPattern":null,"preventionTips":["Use V0-V31 for LSX and X0-X31 for LASX SIMD operations on LoongArch.","Remove SIMD arrangement suffixes from scalar (R/F) instructions.","Verify register prefix spelling when porting from GNU as syntax."],"tags":["go","asm","loong64","lsx","lasx","assembler"],"backgroundTag":null,"analyzedSha":"b6b368adc57c96c3151d224d172029f233ead2c3","analyzedAt":"2026-08-12T00:22:02.250Z","schemaVersion":2},"datasetVersion":"2026-08-12T13:17:24.610Z"}