{"record":{"id":"eeb58f2f943a7cf0","repo":"embassy-rs/embassy","slug":"hse-is-not-ready-to-be-selected-as-cpu-clock-sourc","errorCode":null,"errorMessage":"HSE is not ready to be selected as CPU clock source","messagePattern":"HSE is not ready to be selected as CPU clock source","errorType":"panic","errorClass":null,"httpStatus":null,"severity":"error","filePath":"embassy-stm32/src/rcc/n6.rs","lineNumber":357,"sourceCode":"        if config.apb4 > w.ppre4() {\n            debug!(\"  - APB4\");\n            w.set_ppre4(config.apb4);\n        }\n        if config.apb5 > w.ppre5() {\n            debug!(\"  - APB5\");\n            w.set_ppre5(config.apb5);\n        }\n        if config.ahb > w.hpre() {\n            debug!(\"  - AHB\");\n            w.set_hpre(config.ahb);\n        }\n    });\n    // cpuclk\n    debug!(\"configuring cpuclk\");\n    match config.cpu {\n        CpuClk::Hsi if !RCC.sr().read().hsirdy() => panic!(\"HSI is not ready to be selected as CPU clock source\"),\n        CpuClk::Msi if !RCC.sr().read().msirdy() => panic!(\"MSI is not ready to be selected as CPU clock source\"),\n        CpuClk::Hse if !RCC.sr().read().hserdy() => panic!(\"HSE is not ready to be selected as CPU clock source\"),\n        CpuClk::Ic1 if !ic_enabled(1) => panic!(\"IC1 is not ready to be selected as CPU clock source\"),\n        _ => {}\n    }\n    // set source\n    let cpusw = Cpusw::from_bits(config.cpu.to_bits());\n    RCC.cfgr().modify(|w| w.set_cpusw(cpusw));\n    // wait for changes to take effect\n    while RCC.cfgr().read().cpusws() != Cpusws::from_bits(config.cpu.to_bits()) {}\n\n    // sysclk\n    debug!(\"configuring sysclk\");\n    match config.sys {\n        SysClk::Hsi if !RCC.sr().read().hsirdy() => panic!(\"HSI is not ready to be selected as system clock source\"),\n        SysClk::Msi if !RCC.sr().read().msirdy() => panic!(\"MSI is not ready to be selected as system clock source\"),\n        SysClk::Hse if !RCC.sr().read().hserdy() => panic!(\"HSE is not ready to be selected as system clock source\"),\n        SysClk::Ic2 if !ic_enabled(2) || !ic_enabled(6) || !ic_enabled(11) => panic!(\n            \"IC2 is not ready to be selected as system clock source (make sure that IC6 and IC11 were configured as well)\"\n        ),","sourceCodeStart":339,"sourceCodeEnd":375,"githubUrl":"https://github.com/embassy-rs/embassy/blob/463a07b963419a1bfe61d5d597c44acb810afb8b/embassy-stm32/src/rcc/n6.rs#L339-L375","documentation":"On STM32N6, before switching the CPU clock to HSE, the code checks `RCC.sr().hserdy()`. If the external high-speed oscillator is not running and stable, selecting it as the CPU clock would fail, so the library panics.","triggerScenarios":"Setting `config.cpu = CpuClk::Hse` while `hserdy()` is false — HSE not enabled in config (`hse: None`), wrong crystal/bypass mode, or the crystal not oscillating on the board.","commonSituations":"Board lacking the HSE crystal while config selects HSE; incorrect hse bypass setting for an external clock; HSE startup failure due to load capacitor issues.","solutions":["Configure HSE in the rcc config (`hse: Some(Hse { mode, crystal/bypass freq, ... })`) so it is enabled and awaited ready.","If the board has no HSE crystal, use `bypass` with an external clock or switch `cpu` to Hsi/Msi/Ic1.","Verify hardware: crystal frequency, load capacitors, and bypass mode match the config."],"exampleFix":"// before\nrcc: RccConfig { cpu: CpuClk::Hse, ..Default::default() }, // hse never enabled\n// after\nrcc: RccConfig {\n    hse: Some(Hse { freq: MegaHertz::new(24), mode: HseMode::Oscillator }),\n    cpu: CpuClk::Hse,\n    ..Default::default()\n},","handlingStrategy":"validation","validationCode":"if config.rcc.cpu == CpuClk::Hse && config.rcc.hse.is_none() {\n    panic!(\"CpuClk::Hse requires an hse config in rcc\");\n}","typeGuard":"fn hse_ready_for_cpu(rcc: &RccConfig) -> bool {\n    rcc.cpu != CpuClk::Hse || rcc.hse.is_some()\n}","tryCatchPattern":null,"preventionTips":["Configure hse (frequency + oscillator/bypass mode) before selecting CpuClk::Hse.","Match bypass mode to actual hardware clock input; wrong mode keeps hserdy low.","On boards without an HSE crystal, use internal sources instead."],"tags":["rust","embedded","rcc","stm32n6","hse","panic"],"backgroundTag":"invalid-state-transition","analyzedSha":"463a07b963419a1bfe61d5d597c44acb810afb8b","analyzedAt":"2026-09-10T13:38:26.660Z","contentChangedAt":"2026-09-10T13:38:26.660Z","schemaVersion":2},"datasetVersion":"2026-09-16T04:17:20.429Z"}