embassy-rs/embassy · error

cursed bit offset

Error message

cursed bit offset

What it means

In build.rs's RCC register-block generation, the script extracts a register field's bit offset from the chip metadata and expects a `BitOffset::Regular` variant. When the field metadata uses another bit-offset representation (e.g. enumerated/split ranges), the script panics with "cursed bit offset". It signals unsupported/odd field layout in the generated chip metadata, not a user mistake.

Solutions

1. Check embassy-stm32's generated metadata for the offending register/field and normalize it to a regular bit offset.
2. Extend build.rs to handle the alternative BitOffset variant if the field genuinely is non-contiguous.
3. Update or regenerate the chip metadata from a newer SVD/chip definition.

Example fix

// before (build.rs)
let BitOffset::Regular(bit_offset) = bit_offset else { panic!("cursed bit offset") };
// after (handle enumerated fields explicitly)
let offset = match bit_offset {
    BitOffset::Regular(o) => o.offset,
    BitOffset::Enumerated { offset, .. } => offset,
};

// build script panic — no runtime catch; fix metadata or extend BitOffset handling
let offset = match bit_offset {
    BitOffset::Regular(o) => o.offset,
    BitOffset::Enumerated { offset, .. } => offset,
};

When it happens

Trigger: Generating RCC code for a chip whose metadata describes a mux/register field with a non-regular bit offset (BitOffset::Enumerated or similar), e.g. unusual or newly-added STM32 parts with odd field layouts.

Common situations: Adding support for a new STM32 family whose SVD/metadata encodes fields differently; corrupted or hand-edited generated metadata.

Understand the failure class

Background: "This is a bug, please report it": internal invariant violations, unreachable panics, and SNH errors explained — this error's family across 47 libraries.

Related errors

• bad dma channel kind
• Pin has no IOMUXC definitions
• Multiple stm32xx Cargo features enabled
• No stm32xx Cargo feature enabled
• Multiple stm32xx Cargo features enabled

AI-assisted analysis of embassy-rs/embassy@463a07b963 (2026-09-10). Data as JSON: /api/errors/ee84a4d88792431d. Report an issue: GitHub.

Appendix: source

Thrown at embassy-stm32/build.rs:918

                    .iter()
                    .find(|i| i.name.eq_ignore_ascii_case(reg.register))
                    .unwrap()
                    .byte_offset;
                let reg_offset: u8 = (reg_offset / 4).try_into().unwrap();

                let bit_offset = &rcc_registers
                    .ir
                    .fieldsets
                    .iter()
                    .find(|i| i.name.eq_ignore_ascii_case(reg.register))
                    .unwrap()
                    .fields
                    .iter()
                    .find(|i| i.name.eq_ignore_ascii_case(reg.field))
                    .unwrap()
                    .bit_offset;
                let BitOffset::Regular(bit_offset) = bit_offset else {
                    panic!("cursed bit offset")
                };
                let bit_offset: u8 = bit_offset.offset.try_into().unwrap();

                quote! { (#reg_offset, #bit_offset) }
            };

            let reset_offset_and_bit = match rst_reg {
                Some(rst_reg) => {
                    let reset_offset_and_bit = get_offset_and_bit(rst_reg);
                    quote! { Some(#reset_offset_and_bit) }
                }
                None => quote! { None },
            };
            let enable_offset_and_bit = get_offset_and_bit(en_reg);

            let needs_refcount = *rcc_field_count.get(&(en_reg.register, en_reg.field)).unwrap() > 1;
            let refcount_idx = if needs_refcount {
                let refcount_idx = format_ident!("{}_{}", en_reg.register, en_reg.field);

View on GitHub (pinned to 463a07b963)