embassy-rs/embassy · critical

DMA: error on MDMA@ channel

Error message

DMA: error on MDMA@{:08x} channel {}

What it means

The MDMA (master DMA) interrupt handler panics when the channel's transfer-error flag (teif) is set. MDMA is a high-throughput master DMA that can service memory-to-memory and peripheral-to-memory transfers; a transfer error indicates an illegal or failing bus access for the configured channel.

Solutions

1. Validate source and destination addresses are in MDMA-accessible memory; move buffers out of DTCM/ITCM if the chip's MDMA cannot reach them.
2. Check the transfer configuration: data size, burst size, and buffer alignment must be consistent.
3. Confirm the SWRM request number and trigger selection match the intended operation.
4. Reproduce with a minimal memory-to-memory MDMA copy to isolate whether the peripheral or the memory region is at fault.

Example fix

// before
static mut DST: [u8; 256] = [0; 256]; // in DTCM, unreachable by MDMA
mdma.copy(&SRC, &mut DST).await;

// after
static mut DST: [u8; 256] = [0; 256]; // placed in AXI SRAM via linker section
mdma.copy(&SRC, &mut DST).await;

// Validate MDMA targets before the copy:
let ok = |addr: u32| (0x2400_0000..0x2405_0000).contains(&addr); // AXI SRAM example
assert!(ok(src.as_ptr() as u32) && ok(dst.as_ptr() as u32), "MDMA cannot access one of the buffers");

fn mdma_accessible<T>(buf: &[T]) -> bool {
    let addr = buf.as_ptr() as u32;
    // Adjust per chip: MDMA usually reaches AXI SRAM, not DTCM/ITCM on all parts
    (0x2400_0000..0x2405_0000).contains(&addr)
}

// IRQ panic is unrecoverable; validate before starting:
assert!(mdma_accessible(&dst) && mdma_accessible(&src), "invalid MDMA buffer placement");

When it happens

Trigger: on_irq for an MDMA channel reads isr.teif() true — e.g. source/destination address in a region MDMA cannot access, bus contention/fault, or misconfigured burst/transfer size on an MDMA channel operation.

Common situations: Memory-to-memory copy into DTCM/ITCM regions not reachable by MDMA on some parts; invalid SWRM (software request) configuration; buffer alignment smaller than the configured burst size; attempting to write to read-only memory regions.

Understand the failure class

Background: "Invalid value" and "allowed values are" config errors: what your library rejected and how to fix it — this error's family across 41 libraries.

Related errors

• DMA data error
• DMA: error on DMA_0 channel
• DMA: error on DMA@ channel
• DMA: error on BDMA@ channel
• MDMA: max block count hit

AI-assisted analysis of embassy-rs/embassy@463a07b963 (2026-09-10). Data as JSON: /api/errors/6ca1f82d30014519. Report an issue: GitHub.

Appendix: source

Thrown at embassy-stm32/src/dma/dma_bdma.rs:90

            }
            if !activity {
                return;
            }

            state.waker.wake();
        }
        #[cfg(mdma)]
        DmaInfo::Mdma(r) => {
            // If our bit in gisr0 is not set, then the interrupt is not for this channel
            if !r.gisr0().read().gif(info.num) {
                return;
            }

            let isr = r.ch(info.num).isr();
            let ifcr = r.ch(info.num).ifcr();

            if isr.read().teif() {
                panic!("DMA: error on MDMA@{:08x} channel {}", r.as_ptr() as u32, info.num);
            }

            if isr.read().ctcif() {
                // Channel Transfer complete
                state.complete_count.fetch_add(1, Ordering::Release);
                ifcr.write(|w| w.set_cctcif(true));
            }

            state.waker.wake();
        }
    }
}

pub(crate) struct ChannelInfo {
    pub(crate) dma: DmaInfo,
    pub(crate) num: usize,
    #[cfg(feature = "_dual-core")]
    pub(crate) irq: pac::Interrupt,

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