rust-lang/rust · error

vector type

Error message

vector type

What it means

This expect("vector type") fires inside the argument-adjustment arm for x86 masked SIMD GCC builtins (the large __builtin_ia32_*512_mask / 256/128 mask family). The backend synthesizes the missing src and mask operands that LLVM intrinsics carry but GCC builtins expose differently; it reads gcc_func.get_param_type(2) (the source operand slot) and calls dyncast_vector() to obtain the vector type so it can construct an all-zero src. If that parameter is not a vector type, dyncast_vector returns None and the expect panics.

Source

Thrown at compiler/rustc_codegen_gcc/src/intrinsic/llvm.rs:272

            | "__builtin_ia32_psrlv32hi_mask"
            | "__builtin_ia32_psraw512_mask"
            | "__builtin_ia32_psrawi512_mask"
            | "__builtin_ia32_psrlv16hi_mask"
            | "__builtin_ia32_psrlv8hi_mask"
            | "__builtin_ia32_psrav32hi_mask"
            | "__builtin_ia32_permvarhi512_mask"
            | "__builtin_ia32_pshufb512_mask"
            | "__builtin_ia32_psrav16hi_mask"
            | "__builtin_ia32_psrav8hi_mask"
            | "__builtin_ia32_permvarhi256_mask"
            | "__builtin_ia32_permvarhi128_mask"
            | "__builtin_ia32_maxph128_mask"
            | "__builtin_ia32_maxph256_mask"
            | "__builtin_ia32_minph128_mask"
            | "__builtin_ia32_minph256_mask" => {
                let mut new_args = args.to_vec();
                let arg3_type = gcc_func.get_param_type(2);
                let vector_type = arg3_type.dyncast_vector().expect("vector type");
                let zero = builder.context.new_rvalue_zero(vector_type.get_element_type());
                let num_units = vector_type.get_num_units();
                let first_arg =
                    builder.context.new_rvalue_from_vector(None, arg3_type, &vec![zero; num_units]);
                new_args.push(first_arg);
                let arg4_type = gcc_func.get_param_type(3);
                let minus_one = builder.context.new_rvalue_from_int(arg4_type, -1);
                new_args.push(minus_one);
                args = new_args.into();
            }
            "__builtin_ia32_dbpsadbw512_mask"
            | "__builtin_ia32_dbpsadbw256_mask"
            | "__builtin_ia32_dbpsadbw128_mask" => {
                let mut new_args = args.to_vec();
                let arg4_type = gcc_func.get_param_type(3);
                let vector_type = arg4_type.dyncast_vector().expect("vector type");
                let zero = builder.context.new_rvalue_zero(vector_type.get_element_type());
                let num_units = vector_type.get_num_units();

View on GitHub (pinned to 22057b88b0)

Solutions

1. Upgrade libgccjit (and GCC) to a version whose __builtin_ia32_*_mask builtins expose a vector type at parameter index 2.
2. Verify the GCC target features (avx512f/avx512bw/etc.) are enabled for the builtin being called; a missing feature can alter the resolved builtin signature.
3. Disable the affected AVX-512 masked intrinsic in source (drop the mask argument variant, use the unmasked intrinsic) to avoid the adjustment arm.
4. Report upstream to rustc_codegen_gcc with the exact builtin name and libgccjit version.

Example fix

// before
let r = _mm512_add_epi32_mask(a, b, mask);
// after (use the unmasked variant when libgccjit mis-reports the src param type)
let r = _mm512_add_epi32(a, b);

# The panic is in the AVX-512 masked-builtin shim (arg3 must be a vector type).
# Fail fast if the crate uses 512-bit masked SIMD intrinsics under the GCC backend.
if rg --type rust -n '_mm512_|__builtin_ia32_.*512_mask|target_feature\s*=\s*"avx512' src/; then
  echo 'ERROR: AVX-512 masked intrinsics trigger GCC backend panic (llvm.rs:272)' >&2
  exit 1
fi

// Compile-time cfg gate: AVX-512 masked SIMD requires the LLVM backend.
#[cfg(all(feature = "gcc-backend", any(target_feature = "avx512f", target_feature = "avx512bw")))]
compile_error!(
    "AVX-512 masked intrinsics are not supported by the GCC backend; build without 'gcc-backend' or drop avx512 target-features"
);

set +e
RUSTFLAGS='-C codegen-backend=gcc' cargo build --release 2>gcc_build.log
status=$?
set -e
if [ $status -ne 0 ]; then
  echo 'GCC backend failed (llvm.rs:272 avx512 vector); rebuilding with LLVM backend' >&2
  cargo build --release
fi

When it happens

Trigger: Codegen of any LLVM masked SIMD intrinsic that maps to one of the listed __builtin_ia32_*512_mask / _256_mask / _128_mask builtins (e.g. AVX-512 packed arithmetic, pack/unpack, permute, compare-mask) when the GCC builtin's 3rd parameter is not reported as a vector type by libgccjit. Triggered by std::arch::x86_64 SIMD intrinsics in the masked variants.

Common situations: Using std::arch::x86_64 / avx512f masked intrinsics; GCC/libgccjit version mismatch where the builtin signature or type-kind changed; building SIMD-heavy crates (e.g. wide, packed_simd) against a libgccjit that does not expose the expected vector type for the src parameter.

Related errors

• Called extract_element on a non-vector type
• `rustc_codegen_gcc` doesn't support scalable vectors yet
• cannot cast a non-native integer to type {:?}
• cannot cast a {:?} to non-native integer
• Kind: {:?}

AI-assisted analysis of rust-lang/rust@22057b88b0 (2026-08-03). Data as JSON: /data/errors/e462c046487bd36d.json. Report an issue: GitHub.