embassy-rs/embassy · error

LSE is not configured, but selected for time_driver!!!

Error message

LSE is not configured, but selected for time_driver!!!

What it means

embassy-stm32 lets you pick the RTC time-driver clock source in the rcc config. If `time_driver` is `Lse`, the code checks `config.ls.lse` is Some before using it; if LSE was never configured it panics because it cannot drive the timebase from a clock that has not been set up.

Solutions

1. Add `ls: LsConfig { lse: Some(LseConfig::default()), ..Default::default() }` to the rcc config so LSE is configured before selection.
2. Or switch `time_driver` to a source that is configured, e.g. `TimeDriver::Hsi` or `TimeDriver::Default`.
3. Verify the board actually has an LSE crystal; without it use the internal MSI/HSI as time driver.

Example fix

// before
rcc: RccConfig { time_driver: TimeDriver::Lse, ..Default::default() },
// after
rcc: RccConfig {
    time_driver: TimeDriver::Lse,
    ls: LsConfig { lse: Some(LseConfig::default()), ..Default::default() },
    ..Default::default()
},

if config.rcc.time_driver == TimeDriver::Lse && config.rcc.ls.lse.is_none() {
    panic!("TimeDriver::Lse requires rcc.ls.lse to be configured");
}

fn lse_time_driver_valid(rcc: &RccConfig) -> bool {
    rcc.time_driver != TimeDriver::Lse || rcc.ls.lse.is_some()
}

When it happens

Trigger: Setting `config.rcc.time_driver = TimeDriver::Lse` (macro form `<$Sel>::Lse`) while `config.rcc.ls.lse` is `None` (LSE not configured / not declared), during `init_rcc` invoked by `reinit`.

Common situations: Selecting LSE timebase for accurate RTC timing but forgetting `ls: LsConfig { lse: Some(...) }`; board config where the 32.768 kHz crystal was removed or not modeled; migrating configs between chips where LSE defaults differ.

Understand the failure class

Background: "is required", "must be set", "missing required field": configuration validation errors across open-source libraries — this error's family across 36 libraries.

Related errors

• must not set PllSource::Disable
• must not select PLL source as DISABLE
• IC source was set to PLL , but it is not currently enabled
• HSI is not ready to be selected as CPU clock source
• MSI is not ready to be selected as CPU clock source

AI-assisted analysis of embassy-rs/embassy@463a07b963 (2026-09-10). Data as JSON: /api/errors/a7feab8543734e12. Report an issue: GitHub.

Appendix: source

Thrown at embassy-stm32/src/rcc/mod.rs:696

            //
            // STM32WBA and STM32L4 use per-timer mux enums (Lptim1sel / Lptim2sel)
            // while other families share a single Lptimsel enum.
            macro_rules! ensure_lptim_clk {
                ($field:ident, $Sel:path, $pclk:pat) => {
                    match config.mux.$field {
                        $pclk => {
                            config.mux.$field = <$Sel>::Lsi;
                            config.ls.lsi = true;
                        }
                        <$Sel>::Lsi => {
                            config.ls.lsi = true;
                        }
                        <$Sel>::Hsi => {
                            config.hsi = true;
                        }
                        <$Sel>::Lse => {
                            if config.ls.lse.is_none() {
                                panic!("LSE is not configured, but selected for time_driver!!!");
                            }
                            #[cfg(any(rcc_l5, rcc_u5, rcc_u3, rcc_wle, rcc_wl5, rcc_wba, rcc_u0))]
                            if let Some(mut lse_config) = config.ls.lse {
                                lse_config.peripherals_clocked = true;
                                config.ls.lse = Some(lse_config);
                            }
                        }
                        #[allow(unreachable_patterns)]
                        _ => {}
                    }
                };
            }

            #[cfg(time_driver_lptim1)]
            {
                #[cfg(not(any(stm32wba, rcc_l4, rcc_l4plus)))]
                {
                    use crate::pac::rcc::vals::Lptimsel;

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