embassy-rs/embassy · error

SYS not supported yet

Error message

SYS not supported yet

What it means

embassy-stm32's STM32WBA RCC driver does not yet implement selecting the system clock (SYS) as the SAI1 audio clock source. When config.mux.sai1sel is Sai1sel::Sys, init panics with 'SYS not supported yet' — a driver capability limitation, not a hardware error.

Solutions

1. Set config.mux.sai1sel to Sai1sel::Hsi, Sai1sel::Pll1Q, or Sai1sel::Pll1P (configuring the corresponding clock, e.g. PLL1.Q, so it is Some)
2. Wait for/upgrade to an embassy-stm32 version that implements SYS for SAI1 on WBA
3. Contribute/patch the driver to add the Sai1sel::Sys arm if SYS routing is required

Example fix

// before
config.mux.sai1sel = mux::Sai1sel::SYS; // panic: not supported
// after
config.mux.sai1sel = mux::Sai1sel::PLL1_Q; // and ensure pll1.q is configured
// or: config.mux.sai1sel = mux::Sai1sel::HSI;

assert!(!matches!(config.mux.sai1sel, mux::Sai1sel::SYS),
    "SAI1 SYS clock source not implemented in embassy-stm32 WBA driver");

fn sai1sel_supported(sel: &mux::Sai1sel) -> bool {
    matches!(sel, mux::Sai1sel::Hsi | mux::Sai1sel::PLL1_Q | mux::Sai1sel::PLL1_P)
}

When it happens

Trigger: rcc init with config.mux.sai1sel = Sai1sel::Sys on an STM32WBA target with the sai_v4_2pdm feature/chip variant.

Common situations: Configuring SAI1 to derive its kernel clock from sysclk for simplicity; porting SAI mux settings from another STM32 family where SYS is supported.

Related errors

• AUDIOCLK not supported yet
• Invalid ahb5_pre for HSI/HSE sysclk: only DIV1 and DIV2 are…
• cannot select OTG_HS reference clock with source frequency…
• The LCD driver needs the RTC/LCD clock to be running
• if PLL source is HSI, PLL prediv must be 2.

AI-assisted analysis of embassy-rs/embassy@463a07b963 (2026-09-10). Data as JSON: /api/errors/3ae5081aca741120. Report an issue: GitHub.

Appendix: source

Thrown at embassy-stm32/src/rcc/wba.rs:425

            Hertz(32_000_000) => Usbrefcksel::Mhz32,
            _ => panic!(
                "cannot select OTG_HS reference clock with source frequency of {}, must be one of 16, 19.2, 20, 24, 26, 32 MHz",
                clk_val
            ),
        },
        None => Usbrefcksel::Mhz24,
    };
    #[cfg(all(stm32wba, peri_usb_otg_hs))]
    SYSCFG.otghsphycr().modify(|w| {
        w.set_clksel(usb_refck_sel);
    });

    #[cfg(sai_v4_2pdm)]
    let audioclk = match config.mux.sai1sel {
        Sai1sel::Hsi => Some(HSI_FREQ),
        Sai1sel::Pll1Q => Some(pll1.q.expect("PLL1.Q not configured")),
        Sai1sel::Pll1P => Some(pll1.p.expect("PLL1.P not configured")),
        Sai1sel::Sys => panic!("SYS not supported yet"),
        Sai1sel::Audioclk => panic!("AUDIOCLK not supported yet"),
        _ => None,
    };

    let lsi = config.ls.lsi.then_some(LSI_FREQ);
    let lse = config.ls.lse.map(|c| c.frequency);

    // Disable HSI if not used
    if !config.hsi {
        assert!(
            config.mux.rngsel != mux::Rngsel::Hsi,
            "RNG is configured to use HSI but HSI is disabled"
        );
        RCC.cr().modify(|w| w.set_hsion(false));
    }

    config.mux.init();

View on GitHub (pinned to 463a07b963)