embassy-rs/embassy · error
MSI is not ready to be selected as system clock source
Error message
MSI is not ready to be selected as system clock source
What it means
On STM32N6, before switching the system clock to MSI, the code checks `RCC.sr().msirdy()`. If MSI is not running and ready, selecting it as the system bus clock source is invalid and the library panics.
Solutions
- Add an MSI config (`msi: Some(MsiConfig...)`) to the rcc config so MSI is enabled and ready.
- Or pick a ready sysclk source (Hsi/Hse/Ic2) in `config.sys`.
- Ensure neither the cpu-clock stage nor other code disables MSI before the sysclk switch.
Example fix
// before
rcc: RccConfig { sys: SysClk::Msi, ..Default::default() }, // msi absent
// after
rcc: RccConfig { msi: Some(MsiConfig::default()), sys: SysClk::Msi, ..Default::default() }, Defensive patterns
Strategy: validation
Validate before calling
if config.rcc.sys == SysClk::Msi && config.rcc.msi.is_none() {
panic!("SysClk::Msi requires an msi config in rcc");
} Type guard
fn msi_ready_for_sys(rcc: &RccConfig) -> bool {
rcc.sys != SysClk::Msi || rcc.msi.is_some()
} Prevention
- Pair SysClk::Msi with an explicit MsiConfig entry.
- Ensure earlier init stages (cpu switch) leave MSI enabled.
- Test init on the actual board so msirdy timing issues surface early.
When it happens
Trigger: Setting `config.sys = SysClk::Msi` while `msirdy()` is false — MSI not configured/enabled, or MSI disabled earlier in the init sequence before the sysclk switch.
Common situations: Choosing MSI as sysclk without an msi config entry; mixed cpu/sys configs where one stage turns MSI off; low-power configs relying on MSI but not enabling it.
Understand the failure class
Background: "Invalid state transition" errors: "status must be X, actually Y", "already rejected/charging/uninstalled", "cannot ... while running" — what they mean when a library rejects your call — this error's family across 31 libraries.
Related errors
- MSI is not ready to be selected as CPU clock source
- HSI is not ready to be selected as system clock source
- HSE is not ready to be selected as system clock source
- IC source was set to PLL , but it is not currently enabled
- HSI is not ready to be selected as CPU clock source
AI-assisted analysis of embassy-rs/embassy@463a07b963 (2026-09-10).
Data as JSON: /api/errors/267978dfffb86c53.
Report an issue: GitHub.
Appendix: source
Thrown at embassy-stm32/src/rcc/n6.rs:371
debug!("configuring cpuclk");
match config.cpu {
CpuClk::Hsi if !RCC.sr().read().hsirdy() => panic!("HSI is not ready to be selected as CPU clock source"),
CpuClk::Msi if !RCC.sr().read().msirdy() => panic!("MSI is not ready to be selected as CPU clock source"),
CpuClk::Hse if !RCC.sr().read().hserdy() => panic!("HSE is not ready to be selected as CPU clock source"),
CpuClk::Ic1 if !ic_enabled(1) => panic!("IC1 is not ready to be selected as CPU clock source"),
_ => {}
}
// set source
let cpusw = Cpusw::from_bits(config.cpu.to_bits());
RCC.cfgr().modify(|w| w.set_cpusw(cpusw));
// wait for changes to take effect
while RCC.cfgr().read().cpusws() != Cpusws::from_bits(config.cpu.to_bits()) {}
// sysclk
debug!("configuring sysclk");
match config.sys {
SysClk::Hsi if !RCC.sr().read().hsirdy() => panic!("HSI is not ready to be selected as system clock source"),
SysClk::Msi if !RCC.sr().read().msirdy() => panic!("MSI is not ready to be selected as system clock source"),
SysClk::Hse if !RCC.sr().read().hserdy() => panic!("HSE is not ready to be selected as system clock source"),
SysClk::Ic2 if !ic_enabled(2) || !ic_enabled(6) || !ic_enabled(11) => panic!(
"IC2 is not ready to be selected as system clock source (make sure that IC6 and IC11 were configured as well)"
),
_ => {}
}
// switch the system bus clock
let syssw = Syssw::from_bits(config.sys.to_bits());
RCC.cfgr().modify(|w| w.set_syssw(syssw));
// wait for changes to be applied
while RCC.cfgr().read().syssws() != Syssws::from_bits(config.sys.to_bits()) {}
// decreasing dividers
debug!("configuring decreasing pclk dividers");
RCC.cfgr2().modify(|w| {
if config.ahb < w.hpre() {
debug!(" - AHB");
w.set_hpre(config.ahb);View on GitHub (pinned to 463a07b963)